Inventor · disambiguated record
Alfred Yeung
Also filed as: YEUNG ALFRED · YEUNG ALFRED K W
21 granted patents·1 pending application·159 citations·filing 1997–2021
94Inventor score
Files withAMPERE COMPUTING LLC9APEX SEMICONDUCTOR5APPLIED MICRO CIRCUITS CORP2PARTOVI HAMID2SUN MICROSYSTEMS INC2
Top patents by PatentIndex Score
22 records- 0197US11100028B1Programmable I/O switch/bridge chipletAPEX SEMICONDUCTOR·Filed 2020·Granted Aug 24, 2021·60 cites·20 claims
- 0296US10348281B1Clock control based on voltage associated with a microprocessorAMPERE COMPUTING LLC·Filed 2016·Granted Jul 9, 2019·20 cites·15 claims
- 0394US10145868B2Self-referenced on-die voltage droop detectorAMPERE COMPUTING LLC·Filed 2016·Granted Dec 4, 2018·7 cites·18 claims
- 0493US11475194B1Multi-PVT frequency prediction (multi-PVT FP) for statically timed designs through statistical regressionAPEX SEMICONDUCTOR·Filed 2020·Granted Oct 18, 2022·6 cites·22 claims
- 0593US11036908B1Techniques for simulation-based timing path labeling for multi-operating condition frequency predictionAPEX SEMICONDUCTOR·Filed 2020·Granted Jun 15, 2021·8 cites·23 claims
- 0692US10162373B1Variation immune on-die voltage droop detectorAMPERE COMPUTING LLC·Filed 2017·Granted Dec 25, 2018·11 cites·20 claims
- 0785US8421514B1Hazard-free minimal-latency flip-flop (HFML-FF)YEUNG ALFRED·Filed 2011·Granted Apr 16, 2013·9 cites·19 claims
- 0884US10318696B1Efficient techniques for process variation reduction for static timing analysisAMPERE COMPUTING LLC·Filed 2016·Granted Jun 11, 2019·7 cites·20 claims
- 0984US10318676B2Techniques for statistical frequency enhancement of statically timed designsAMPERE COMPUTING LLC·Filed 2017·Granted Jun 11, 2019·6 cites·13 claims
- 1083US9876007B1MIMcap creation and utilization methodologyAPPLIED MICRO CIRCUITS CORP·Filed 2016·Granted Jan 23, 2018·4 cites·10 claims
- 1181US9438225B1High efficiency half-cross-coupled decoupling capacitorAPPLIED MICRO CIRCUITS CORP·Filed 2015·Granted Sep 6, 2016·6 cites·20 claims
- 1279US11386252B1Techniques for simulation-based timing path labeling for multi-operating condition frequency predictionAPEX SEMICONDUCTOR·Filed 2021·Granted Jul 12, 2022·1 cites·20 claims
- 1376US11295057B1Continuous and discrete corner regularization in multi-PVT timing predictionAPEX SEMICONDUCTOR·Filed 2021·Granted Apr 5, 2022·1 cites·20 claims
- 1471US8604854B1Pseudo single-phase flip-flop (PSP-FF)PARTOVI HAMID·Filed 2012·Granted Dec 10, 2013·4 cites·20 claims
- 1568US8618856B1Shadow latchYEUNG ALFRED·Filed 2011·Granted Dec 31, 2013·3 cites·17 claims
- 1662US8497721B1Pass gate shadow latchPARTOVI HAMID·Filed 2011·Granted Jul 30, 2013·2 cites·20 claims
- 1752US11049854B1MIMCAP creation and utilization methodologyAMPERE COMPUTING LLC·Filed 2018·Granted Jun 29, 2021·0 cites·19 claims
- 1843US10109345B2Write assist for memories with resistive bit linesAMPERE COMPUTING LLC·Filed 2018·Granted Oct 23, 2018·0 cites·11 claims
- 1943US2002124162A1Computer system and method for fetching a next instructionSUN MICROSYSTEMS INC·Filed 2001·Application pending·0 cites
- 2040US10049725B2Write assist for memories with resistive bit linesAMPERE COMPUTING LLC·Filed 2016·Granted Aug 14, 2018·0 cites·15 claims
- 2132US6304961B1Computer system and method for fetching a next instructionSUN MICROSYSTEMS INC·Filed 1997·Granted Oct 16, 2001·4 cites·25 claims
- 2226US9998100B2Package programmable decoupling capacitor arrayAMPERE COMPUTING LLC·Filed 2015·Granted Jun 12, 2018·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →