Inventor · disambiguated record
Alban Zaka
Also filed as: ZAKA ALBAN
28 granted patents·3 pending applications·54 citations·filing 2012–2023
94Inventor score
Files withGLOBALFOUNDRIES INC23GLOBALFOUNDRIES US INC4GLOBALFOUNDRIES DRESDEN MOD 13GLOBAL FOUNDRIES INC1
Top patents by PatentIndex Score
31 records- 0195US11552192B2High-voltage devices integrated on semiconductor-on-insulator substrateGLOBALFOUNDRIES INC·Filed 2020·Granted Jan 10, 2023·4 cites·10 claims
- 0294US9324869B1Method of forming a semiconductor device and resulting semiconductor devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Apr 26, 2016·12 cites·20 claims
- 0391US10121846B1Resistor structure with high resistance based on very thin semiconductor layerGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 6, 2018·10 cites·19 claims
- 0488US9466717B1Complex semiconductor devices of the SOI typeGLOBALFOUNDRIES INC·Filed 2015·Granted Oct 11, 2016·6 cites·17 claims
- 0586US9905707B1MOS capacitive structure of reduced capacitance variabilityGLOBALFOUNDRIES INC·Filed 2016·Granted Feb 27, 2018·6 cites·19 claims
- 0684US11315949B2Charge-trapping sidewall spacer-type non-volatile memory device and methodGLOBALFOUNDRIES DRESDEN MOD 1·Filed 2020·Granted Apr 26, 2022·2 cites·20 claims
- 0778US9881841B2Methods for fabricating integrated circuits with improved implantation processesGLOBALFOUNDRIES INC·Filed 2016·Granted Jan 30, 2018·2 cites·19 claims
- 0874US8853752B2Performance enhancement in transistors by providing a graded embedded strain-inducing semiconductor region with adapted angles with respect to the substrate surfaceGLOBALFOUNDRIES INC·Filed 2012·Granted Oct 7, 2014·5 cites·24 claims
- 0970US10170614B2Method of forming a semiconductor deviceGLOBALFOUNDRIES INC·Filed 2018·Granted Jan 1, 2019·1 cites·20 claims
- 1069US11984503B2High-voltage devices integrated on semiconductor-on-insulator substrateGLOBALFOUNDRIES DRESDEN MOD 1·Filed 2022·Granted May 14, 2024·0 cites·15 claims
- 1169US9263270B2Method of forming a semiconductor device structure employing fluorine doping and according semiconductor device structureGLOBALFOUNDRIES INC·Filed 2013·Granted Feb 16, 2016·2 cites·20 claims
- 1268US2024055434A1Structure including transistor using buried insulator layer as gate dielectric and trench isolations in source and drainGLOBALFOUNDRIES US INC·Filed 2023·Application pending·0 cites
- 1367US11837605B2Structure including transistor using buried insulator layer as gate dielectric and trench isolations in source and drainGLOBALFOUNDRIES US INC·Filed 2021·Granted Dec 5, 2023·0 cites·7 claims
- 1466US10580863B2Transistor element with reduced lateral electrical fieldGLOBALFOUNDRIES INC·Filed 2017·Granted Mar 3, 2020·1 cites·2 claims
- 1566US9312189B2Methods for fabricating integrated circuits with improved implantation processesGLOBALFOUNDRIES INC·Filed 2014·Granted Apr 12, 2016·1 cites·15 claims
- 1664US9711513B2Semiconductor structure including a nonvolatile memory cell and method for the formation thereofGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 18, 2017·1 cites·15 claims
- 1762US11929433B2Asymmetric FET for FDSOI devicesGLOBALFOUNDRIES US INC·Filed 2021·Granted Mar 12, 2024·0 cites·16 claims
- 1862US10283584B2Capacitive structure in a semiconductor device having reduced capacitance variabilityGLOBALFOUNDRIES INC·Filed 2016·Granted May 7, 2019·1 cites·20 claims
- 1954US11245032B2Asymmetric FET for FDSOI devicesGLOBALFOUNDRIES US INC·Filed 2019·Granted Feb 8, 2022·0 cites·12 claims
- 2050US10038091B2Semiconductor device and methodGLOBALFOUNDRIES INC·Filed 2016·Granted Jul 31, 2018·0 cites·20 claims
- 2150US9190516B2Method for a uniform compressive strain layer and device thereofGLOBALFOUNDRIES INC·Filed 2014·Granted Nov 17, 2015·0 cites·14 claims
- 2248US9460955B2Integrated circuits with shallow trench isolations, and methods for producing the sameGLOBALFOUNDRIES INC·Filed 2013·Granted Oct 4, 2016·0 cites·18 claims
- 2347US11610999B2Floating-gate devices in high voltage applicationsGLOBALFOUNDRIES DRESDEN MOD 1·Filed 2020·Granted Mar 21, 2023·0 cites·20 claims
- 2446US10283642B1Thin body field effect transistor including a counter-doped channel area and a method of forming the sameGLOBALFOUNDRIES INC·Filed 2018·Granted May 7, 2019·0 cites·15 claims
- 2546US9396950B2Low thermal budget schemes in semiconductor device fabricationGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 19, 2016·0 cites·16 claims
- 2645US10644152B1Buried-channel low noise transistors and methods of making such devicesGLOBALFOUNDRIES INC·Filed 2019·Granted May 5, 2020·0 cites·20 claims
- 2743US10497803B2Fully depleted silicon on insulator (FDSOI) lateral double-diffused metal oxide semiconductor (LDMOS) for high frequency applicationsGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 3, 2019·0 cites·20 claims
- 2843US2015187909A1Methods for fabricating multiple-gate integrated circuitsGLOBAL FOUNDRIES INC·Filed 2013·Application pending·0 cites
- 2941US2014264626A1Method for forming a gate electrode of a semiconductor device, gate electrode structure for a semiconductor device and according semiconductor device structureGLOBALFOUNDRIES INC·Filed 2014·Application pending·0 cites
- 3038US9741625B2Method of forming a semiconductor device with STI structures on an SOI substrateGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 22, 2017·0 cites·20 claims
- 3135US10930777B2Laterally double diffused metal oxide semiconductor (LDMOS) device on fully depleted silicon on insulator (FDSOI) enabling high input voltageGLOBALFOUNDRIES INC·Filed 2017·Granted Feb 23, 2021·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →