Inventor · disambiguated record
Amruthavalli Pallavi Alur
Also filed as: ALUR AMRUTHAVALLI · ALUR AMRUTHAVALLI P · ALUR AMRUTHAVALLI PALLAVI
46 granted patents·6 pending applications·188 citations·filing 2007–2025
97Inventor score
Top patents by PatentIndex Score
52 records- 0199US10163798B1Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling sameINTEL CORP·Filed 2017·Granted Dec 25, 2018·105 cites·25 claims
- 0296US11664290B2Package with underfill containment barrierINTEL CORP·Filed 2021·Granted May 30, 2023·3 cites·20 claims
- 0396US11043457B2Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling sameINTEL CORP·Filed 2020·Granted Jun 22, 2021·3 cites·9 claims
- 0494US10707168B2Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling sameINTEL CORP·Filed 2018·Granted Jul 7, 2020·7 cites·14 claims
- 0593US11923257B2Hybrid microelectronic substratesINTEL CORP·Filed 2021·Granted Mar 5, 2024·2 cites·18 claims
- 0692US7749900B2Method and core materials for semiconductor packagingINTEL CORP·Filed 2008·Granted Jul 6, 2010·26 cites·8 claims
- 0791US11430724B2Ultra-thin, hyper-density semiconductor packagesINTEL CORP·Filed 2017·Granted Aug 30, 2022·5 cites·24 claims
- 0890US10624213B1Asymmetric electronic substrate and method of manufactureINTEL CORP·Filed 2018·Granted Apr 14, 2020·5 cites·8 claims
- 0989US11158558B2Package with underfill containment barrierINTEL CORP·Filed 2016·Granted Oct 26, 2021·5 cites·16 claims
- 1089US2025336810A1Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridgeINTEL CORP·Filed 2025·Application pending·0 cites
- 1186US2024332203A1Microelectronic device with embedded die substrate on interposerINTEL CORP·Filed 2024·Application pending·0 cites
- 1284US12476174B2Ultra-thin, hyper-density semiconductor packagesINTEL CORP·Filed 2023·Granted Nov 18, 2025·0 cites·20 claims
- 1384US12327773B2Package with underfill containment barrierINTEL CORP·Filed 2024·Granted Jun 10, 2025·0 cites·20 claims
- 1484US11430740B2Microelectronic device with embedded die substrate on interposerINTEL CORP·Filed 2017·Granted Aug 30, 2022·2 cites·13 claims
- 1584US9953959B1Metal protected fan-out cavityINTEL CORP·Filed 2017·Granted Apr 24, 2018·4 cites·8 claims
- 1683US12400952B2Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridgeINTEL CORP·Filed 2023·Granted Aug 26, 2025·0 cites·20 claims
- 1780US11935805B2Package with underfill containment barrierINTEL CORP·Filed 2023·Granted Mar 19, 2024·0 cites·20 claims
- 1880US11894311B2Microelectronic device with embedded die substrate on interposerINTEL CORP·Filed 2022·Granted Feb 6, 2024·0 cites·19 claims
- 1980US10734358B2Multi-packaging for single-socketingINTEL CORP·Filed 2018·Granted Aug 4, 2020·3 cites·27 claims
- 2079US12406914B2Ultra-thin, hyper-density semiconductor packagesINTEL CORP·Filed 2022·Granted Sep 2, 2025·0 cites·20 claims
- 2178US12046560B2Microelectronic device with embedded die substrate on interposerINTEL CORP·Filed 2021·Granted Jul 23, 2024·0 cites·19 claims
- 2277US11908793B2Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridgeINTEL CORP·Filed 2022·Granted Feb 20, 2024·0 cites·22 claims
- 2377US11581271B2Methods to pattern TFC and incorporation in the ODI architecture and in any build up layer of organic substrateINTEL CORP·Filed 2019·Granted Feb 14, 2023·2 cites·27 claims
- 2477US11328968B2Stacked die cavity packageINTEL CORP·Filed 2016·Granted May 10, 2022·2 cites·18 claims
- 2575US10998262B2Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridgeINTEL CORP·Filed 2019·Granted May 4, 2021·1 cites·23 claims
- 2674US11114353B2Hybrid microelectronic substratesINTEL CORP·Filed 2016·Granted Sep 7, 2021·2 cites·20 claims
- 2774US9603247B2Electronic package with narrow-factor via including finish layerINTEL CORP·Filed 2014·Granted Mar 21, 2017·3 cites·18 claims
- 2873US11955426B2Package-integrated multi-turn coil embedded in a package magnetic coreINTEL CORP·Filed 2022·Granted Apr 9, 2024·0 cites·15 claims
- 2973US11764158B2Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling sameINTEL CORP·Filed 2021·Granted Sep 19, 2023·0 cites·20 claims
- 3073US11658111B2Stripped redistrubution-layer fabrication for package-top embedded multi-die interconnect bridgeINTEL CORP·Filed 2021·Granted May 23, 2023·0 cites·20 claims
- 3173US10741947B2Plated through hole socketing coupled to a solder ball to engage with a pinINTEL CORP·Filed 2018·Granted Aug 11, 2020·2 cites·23 claims
- 3273US2025294781A1Magnetic core inductors on package substratesINTEL CORP·Filed 2025·Application pending·0 cites
- 3372US11705377B2Stacked die cavity packageINTEL CORP·Filed 2022·Granted Jul 18, 2023·0 cites·7 claims
- 3472US10494700B2Method of fabricating a microelectronic substrateINTEL CORP·Filed 2017·Granted Dec 3, 2019·0 cites·11 claims
- 3571US11393751B2Package-integrated multi-turn coil embedded in a package magnetic coreINTEL CORP·Filed 2018·Granted Jul 19, 2022·1 cites·15 claims
- 3670US12336196B2Magnetic core inductors on package substratesINTEL CORP·Filed 2018·Granted Jun 17, 2025·1 cites·20 claims
- 3770US11107780B2Pseudo-stripline using double solder-resist structureINTEL CORP·Filed 2019·Granted Aug 31, 2021·1 cites·16 claims
- 3870US9758845B2Microelectronic substrates having copper alloy conductive route structuresINTEL CORP·Filed 2014·Granted Sep 12, 2017·0 cites·20 claims
- 3968US11552019B2Substrate patch reconstitution optionsINTEL CORP·Filed 2019·Granted Jan 10, 2023·1 cites·26 claims
- 4066US10980129B2Asymmetric electronic substrate and method of manufactureINTEL CORP·Filed 2020·Granted Apr 13, 2021·0 cites·10 claims
- 4166US8456016B2Method and core materials for semiconductor packagingLI YONGGANG·Filed 2010·Granted Jun 4, 2013·1 cites·11 claims
- 4262US2022183157A1Apparatus with embedded fine line space in a cavity, and a method for forming the sameINTEL CORP·Filed 2022·Application pending·0 cites
- 4361US7909977B2Method of manufacturing a substrate for a microelectronic device, and substrate formed therebyINTEL CORP·Filed 2008·Granted Mar 22, 2011·1 cites·11 claims
- 4460US11676950B2Via-in-via structure for high density package integrated inductorINTEL CORP·Filed 2017·Granted Jun 13, 2023·0 cites·23 claims
- 4552US12272650B2Microelectronic package with substrate cavity for bridge-attachINTEL CORP·Filed 2020·Granted Apr 8, 2025·0 cites·16 claims
- 4650US11272619B2Apparatus with embedded fine line space in a cavity, and a method for forming the sameINTEL CORP·Filed 2016·Granted Mar 8, 2022·0 cites·11 claims
- 4749US11404364B2Multi-layer embedded magnetic inductor coilINTEL CORP·Filed 2018·Granted Aug 2, 2022·0 cites·12 claims
- 4846US11508636B2Multi-layer solution based deposition of dielectrics for advanced substrate architecturesINTEL CORP·Filed 2018·Granted Nov 22, 2022·0 cites·9 claims
- 4946US11075130B2Package substrate having polymer-derived ceramic coreINTEL CORP·Filed 2017·Granted Jul 27, 2021·0 cites·20 claims
- 5041US2020411413A1Substrate for an electronic deviceALUR AMRUTHAVALLI PALLAVI·Filed 2019·Application pending·0 cites
Showing the top 50 of 52 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →