Inventor · disambiguated record
Amanda R. Kaufer
Also filed as: KAUFER AMANDA R · KAUFER AMANDA RENEE
31 granted patents·1 pending application·51 citations·filing 2010–2018
94Inventor score
Top patents by PatentIndex Score
32 records- 0193US8856720B2Test coverage of integrated circuits with masking pattern selectionIBM·Filed 2013·Granted Oct 7, 2014·9 cites·7 claims
- 0291US9103879B2Test coverage of integrated circuits with test vector input spreadingIBM·Filed 2013·Granted Aug 11, 2015·9 cites·5 claims
- 0390US9116205B2Test coverage of integrated circuits with test vector input spreadingIBM·Filed 2012·Granted Aug 25, 2015·8 cites·8 claims
- 0489US8667431B1Test coverage of integrated circuits with masking pattern selectionIBM·Filed 2013·Granted Mar 4, 2014·6 cites·10 claims
- 0584US8407542B2Implementing switching factor reduction in LBISTDOUSKEY STEVEN MICHAEL·Filed 2010·Granted Mar 26, 2013·8 cites·18 claims
- 0675US10372853B2Implementing enhanced diagnostics with intelligent pattern combination in automatic test pattern generation (ATPG)IBM·Filed 2017·Granted Aug 6, 2019·2 cites·18 claims
- 0774US8898530B1Dynamic built-in self-test systemIBM·Filed 2013·Granted Nov 25, 2014·4 cites·13 claims
- 0873US9069041B2Self evaluation of system on a chip with multiple coresIBM·Filed 2012·Granted Jun 30, 2015·2 cites·19 claims
- 0969US10024914B2Diagnosing failure locations of an integrated circuit with logic built-in self-testGLOBALFOUNDRIES INC·Filed 2016·Granted Jul 17, 2018·1 cites·20 claims
- 1066US8516318B2Dynamic scanDOUSKEY STEVEN M·Filed 2010·Granted Aug 20, 2013·2 cites·19 claims
- 1158US9551747B2Inserting bypass structures at tap points to reduce latch dependency during scan testingIBM·Filed 2014·Granted Jan 24, 2017·0 cites·20 claims
- 1258US9529046B2Partitioned scan chain diagnostics using multiple bypass structures and injection pointsIBM·Filed 2014·Granted Dec 27, 2016·0 cites·13 claims
- 1358US9366723B2Test coverage of integrated circuits with masking pattern selectionGLOBALFOUNDRIES INC·Filed 2014·Granted Jun 14, 2016·0 cites·6 claims
- 1457US9568549B2Managing redundancy repair using boundary scansIBM·Filed 2015·Granted Feb 14, 2017·0 cites·13 claims
- 1557US9557383B2Partitioned scan chain diagnostics using multiple bypass structures and injection pointsIBM·Filed 2014·Granted Jan 31, 2017·0 cites·20 claims
- 1657US9547039B2Inserting bypass structures at tap points to reduce latch dependency during scan testingIBM·Filed 2014·Granted Jan 17, 2017·0 cites·14 claims
- 1756US10379159B1Minimization of over-masking in an on product multiple input signature register (OPMISR)IBM·Filed 2018·Granted Aug 13, 2019·0 cites·20 claims
- 1855US10345380B1Implementing over-masking removal in an on product multiple input signature register (OPMISR) test due to common channel mask scan registers (CMSR) loadingIBM·Filed 2018·Granted Jul 9, 2019·0 cites·20 claims
- 1955US9429621B2Implementing enhanced scan chain diagnostics via bypass multiplexing structureIBM·Filed 2015·Granted Aug 30, 2016·0 cites·8 claims
- 2055US9429622B2Implementing enhanced scan chain diagnostics via bypass multiplexing structureIBM·Filed 2015·Granted Aug 30, 2016·0 cites·7 claims
- 2154US9188636B2Self evaluation of system on a chip with multiple coresIBM·Filed 2012·Granted Nov 17, 2015·0 cites·18 claims
- 2253US9201117B2Managing redundancy repair using boundary scansIBM·Filed 2013·Granted Dec 1, 2015·0 cites·6 claims
- 2350US10371749B1Removal of over-masking in an on product multiple input signature register (OPMISR) testIBM·Filed 2018·Granted Aug 6, 2019·0 cites·20 claims
- 2447US10024917B1Implementing decreased scan data interdependence for compressed patterns in on product multiple input signature register (OPMISR) through spreading in stumpmux daisy-chain structureIBM·Filed 2017·Granted Jul 17, 2018·0 cites·20 claims
- 2547US9964591B2Implementing decreased scan data interdependence in on product multiple input signature register (OPMISR) through PRPG control rotationIBM·Filed 2016·Granted May 8, 2018·0 cites·20 claims
- 2646US8627162B2Iimplementing enhanced aperture function calibration for logic built in self test (LBIST)DOUSKEY STEVEN M·Filed 2011·Granted Jan 7, 2014·0 cites·20 claims
- 2745US9003244B2Dynamic built-in self-test systemIBM·Filed 2013·Granted Apr 7, 2015·0 cites·8 claims
- 2844US8762803B2Implementing enhanced pseudo random pattern generators with hierarchical linear feedback shift registers (LFSRs)DOUSKEY STEVEN M·Filed 2012·Granted Jun 24, 2014·0 cites·18 claims
- 2942US10359471B2Implementing decreased scan data interdependence for compressed patterns in on product multiple input signature register (OPMISR) through scan skewingIBM·Filed 2016·Granted Jul 23, 2019·0 cites·20 claims
- 3042US10060978B2Implementing prioritized compressed failure defects for efficient scan diagnosticsIBM·Filed 2016·Granted Aug 28, 2018·0 cites·20 claims
- 3139US2018259576A1Implementing integrated circuit yield enhancement through array fault detection and correction using combined abist, lbist, and repair techniquesIBM·Filed 2017·Application pending·0 cites
- 3233US10234507B2Implementing register array (RA) repair using LBISTIBM·Filed 2016·Granted Mar 19, 2019·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →