Inventor · disambiguated record
Amit Sanghani
Also filed as: SANGHANI AMIT · SANGHANI AMIT D · SANGHANI AMIT DINESH
27 granted patents·1 pending application·223 citations·filing 1997–2017
96Inventor score
Top patents by PatentIndex Score
28 records- 0195US6816991B2Built-in self-testing for double data rate input/outputSUN MICROSYSTEMS INC·Filed 2001·Granted Nov 9, 2004·102 cites·25 claims
- 0290US8522190B1Power droop reduction via clock-gating for at-speed scan testingSANGHANI AMIT·Filed 2012·Granted Aug 27, 2013·12 cites·13 claims
- 0389US10281524B2Test partition external input/output interface control for test partitions in a semiconductorNVIDIA CORP·Filed 2016·Granted May 7, 2019·6 cites·12 claims
- 0487US10317463B2Scan system interface (SSI) moduleNVIDIA CORP·Filed 2016·Granted Jun 11, 2019·6 cites·18 claims
- 0586US7305598B1Test clock generation for higher-speed testing of a semiconductor deviceSANGHANI AMIT·Filed 2005·Granted Dec 4, 2007·16 cites·22 claims
- 0681US9222981B2Global low power capture scheme for coresNVIDIA CORP·Filed 2012·Granted Dec 29, 2015·5 cites·20 claims
- 0780US9377510B2System for reducing peak power during scan shift at the global level for scan based testsNVIDIA CORP·Filed 2012·Granted Jun 28, 2016·5 cites·16 claims
- 0878US10444280B2Independent test partition clock coordination across multiple test partitionsNVIDIA CORP·Filed 2016·Granted Oct 15, 2019·2 cites·20 claims
- 0978US9395414B2System for reducing peak power during scan shift at the local level for scan based testsNVIDIA CORP·Filed 2012·Granted Jul 19, 2016·4 cites·22 claims
- 1074US9500706B2Hybrid on-chip clock controller techniques for facilitating at-speed scan testing and scan architecture supportNVIDIA CORP·Filed 2014·Granted Nov 22, 2016·3 cites·20 claims
- 1167US6629277B1LSSD interfaceSUN MICROSYSTEMS INC·Filed 2000·Granted Sep 30, 2003·13 cites·17 claims
- 1262US11257560B2Test architecture for die to die interconnect for three dimensional integrated circuitsINTEL CORP·Filed 2017·Granted Feb 22, 2022·1 cites·9 claims
- 1358US10545189B2Granular dynamic test systems and methodsNVIDIA CORP·Filed 2016·Granted Jan 28, 2020·0 cites·25 claims
- 1455US10473720B2Dynamic independent test partition clockNVIDIA CORP·Filed 2016·Granted Nov 12, 2019·0 cites·12 claims
- 1555US10451676B2Method and system for dynamic standard test access (DSTA) for a logic block reuseNVIDIA CORP·Filed 2016·Granted Oct 22, 2019·0 cites·20 claims
- 1654US6477684B1Automatic test pattern generation modeling for LSSD to interface with MuxscanSUN MICROSYSTEMS INC·Filed 2000·Granted Nov 5, 2002·6 cites·17 claims
- 1750US9829536B2Performing on-chip partial good die identificationNVIDIA CORP·Filed 2016·Granted Nov 28, 2017·0 cites·19 claims
- 1849US10481203B2Granular dynamic test systems and methodsNVIDIA CORP·Filed 2017·Granted Nov 19, 2019·0 cites·20 claims
- 1948US6014762AMethod and apparatus for scan test of SRAM for microprocessor without full scan capabilitySUN MICROSYSTEMS INC·Filed 1997·Granted Jan 11, 2000·13 cites·15 claims
- 2047US8943457B2Simulating scan tests with reduced resourcesSANGHANI AMIT DINESH·Filed 2008·Granted Jan 27, 2015·2 cites·17 claims
- 2146US10241148B2Virtual access of input/output (I/O) for test via an on-chip star networkNVIDIA CORP·Filed 2015·Granted Mar 26, 2019·0 cites·20 claims
- 2246US5896396AMethod and apparatus for scan test of SRAM for microprocessors without full scan capabilitySUN MICROSYSTEMS INC·Filed 1997·Granted Apr 20, 1999·11 cites·6 claims
- 2344US9885753B2Scan systems and methodsNVIDIA CORP·Filed 2013·Granted Feb 6, 2018·0 cites·18 claims
- 2439US2013271197A1Power droop reduction via clock-gating for at-speed scan testingSANGHANI AMIT·Filed 2012·Application pending·0 cites
- 2536US6629275B1Reinstate apparatus and method to recreate data background for testing SRAMSUN MICROSYSTEMS INC·Filed 2000·Granted Sep 30, 2003·4 cites·14 claims
- 2633US5923835AMethod for scan test of SRAM for microprocessors having full scan capabilitySUN MICROSYSTEMS INC·Filed 1997·Granted Jul 13, 1999·5 cites·2 claims
- 2731US6047386AApparatus for scan test of SRAM for microprocessors having full scan capabilitySUN MICROSYSTEMS INC·Filed 1998·Granted Apr 4, 2000·3 cites·1 claims
- 2830US5881218AApparatus for scan test of SRAM for microprocessors having full scan capabilitySUN MICROSYSTEMS INC·Filed 1997·Granted Mar 9, 1999·4 cites·2 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →