Inventor · disambiguated record
Andrew S. Cassidy
Also filed as: CASSIDY ANDREW S · CASSIDY ANDREW STEPHEN
73 granted patents·10 pending applications·332 citations·filing 2012–2024
98Inventor score
Top patents by PatentIndex Score
83 records- 0197US10621489B2Massively parallel neural inference computing elementsIBM·Filed 2018·Granted Apr 14, 2020·30 cites·33 claims
- 0296US9466022B2Hardware architecture for simulating a neural network of neuronsIBM·Filed 2015·Granted Oct 11, 2016·21 cites·20 claims
- 0395US9244124B2Initializing and testing integrated circuits with selectable scan chains with exclusive-or outputsIBM·Filed 2014·Granted Jan 26, 2016·12 cites·20 claims
- 0494US8990130B2Consolidating multiple neurosynaptic cores into one memoryIBM·Filed 2012·Granted Mar 24, 2015·42 cites·25 claims
- 0593US9160617B2Faulty core recovery mechanisms for a three-dimensional network on a processor arrayIBM·Filed 2012·Granted Oct 13, 2015·16 cites·25 claims
- 0691US9992057B2Yield tolerance in a neurosynaptic systemIBM·Filed 2014·Granted Jun 5, 2018·12 cites·20 claims
- 0790US9159020B2Multiplexing physical neurons to optimize power and areaALCAREZ-ICAZA RIVERA RODRIGO·Filed 2012·Granted Oct 13, 2015·44 cites·23 claims
- 0887US10733500B2Short-term memory using neuromorphic hardwareIBM·Filed 2015·Granted Aug 4, 2020·8 cites·24 claims
- 0987US9984324B2Dual deterministic and stochastic neurosynaptic core circuitIBM·Filed 2016·Granted May 29, 2018·6 cites·14 claims
- 1086US10454759B2Yield tolerance in a neurosynaptic systemIBM·Filed 2018·Granted Oct 22, 2019·3 cites·18 claims
- 1186US9940302B2Interconnect circuits at three dimensional (3-D) bonding interfaces of a processor arrayIBM·Filed 2016·Granted Apr 10, 2018·4 cites·20 claims
- 1286US8990616B2Final faulty core recovery mechanisms for a two-dimensional network on a processor arrayIBM·Filed 2012·Granted Mar 24, 2015·9 cites·25 claims
- 1385US9588937B2Array of processor core circuits with reversible tiersIBM·Filed 2013·Granted Mar 7, 2017·7 cites·20 claims
- 1485US9053429B2Mapping neural dynamics of a neural model on to a coarsely grained look-up tableIBM·Filed 2012·Granted Jun 9, 2015·12 cites·22 claims
- 1584US9852006B2Consolidating multiple neurosynaptic core circuits into one reconfigurable memory block maintaining neuronal information for the core circuitsIBM·Filed 2014·Granted Dec 26, 2017·15 cites·20 claims
- 1684US9087301B2Hardware architecture for simulating a neural network of neuronsIBM·Filed 2012·Granted Jul 21, 2015·11 cites·27 claims
- 1782US10452540B2Memory-mapped interface for message passing computing systemsIBM·Filed 2017·Granted Oct 22, 2019·4 cites·27 claims
- 1881US10282658B2Hardware architecture for simulating a neural network of neuronsIBM·Filed 2016·Granted May 7, 2019·3 cites·15 claims
- 1980US10831595B1Performing error detection during deterministic program executionIBM·Filed 2019·Granted Nov 10, 2020·2 cites·20 claims
- 2080US9563841B2Globally asynchronous and locally synchronous (GALS) neuromorphic networkALVAREZ-ICAZA RIVERA RODRIGO·Filed 2012·Granted Feb 7, 2017·12 cites·20 claims
- 2179US12406186B2Conflict-free, stall-free, broadcast network on chipIBM·Filed 2020·Granted Sep 2, 2025·1 cites·21 claims
- 2279US9747545B2Self-timed, event-driven neurosynaptic core controllerIBM·Filed 2014·Granted Aug 29, 2017·9 cites·18 claims
- 2378US11537859B2Flexible precision neural inference processing unitIBM·Filed 2019·Granted Dec 27, 2022·3 cites·20 claims
- 2477US9924490B2Scaling multi-core neurosynaptic networks across chip boundariesIBM·Filed 2013·Granted Mar 20, 2018·7 cites·20 claims
- 2576US11521085B2Neural network weight distribution from a grid of memory elementsIBM·Filed 2020·Granted Dec 6, 2022·1 cites·24 claims
- 2676US10785745B2Scaling multi-core neurosynaptic networks across chip boundariesIBM·Filed 2017·Granted Sep 22, 2020·2 cites·18 claims
- 2775US11501140B2Runtime reconfigurable neural network processor coreIBM·Filed 2018·Granted Nov 15, 2022·2 cites·21 claims
- 2875US9558443B2Dual deterministic and stochastic neurosynaptic core circuitIBM·Filed 2013·Granted Jan 31, 2017·6 cites·20 claims
- 2975US9424284B2Mapping neural dynamics of a neural model on to a coarsely grained look-up tableIBM·Filed 2015·Granted Aug 23, 2016·2 cites·17 claims
- 3074US12056598B2Runtime reconfigurable neural network processor coreIBM·Filed 2022·Granted Aug 6, 2024·0 cites·24 claims
- 3174US11270196B2Multi-mode low-precision inner-product computation circuits for massively parallel neural inference engineIBM·Filed 2019·Granted Mar 8, 2022·2 cites·20 claims
- 3273US10713561B2Multiplexing physical neurons to optimize power and areaIBM·Filed 2015·Granted Jul 14, 2020·2 cites·18 claims
- 3372US12387082B2Scheduler for mapping neural networks onto an array of neural cores in an inference processing unitIBM·Filed 2018·Granted Aug 12, 2025·2 cites·25 claims
- 3472US10410109B2Peripheral device interconnections for neurosynaptic systemsIBM·Filed 2014·Granted Sep 10, 2019·5 cites·20 claims
- 3570US9886662B2Converting spike event data to digital numeric dataIBM·Filed 2014·Granted Feb 6, 2018·4 cites·20 claims
- 3668US10769519B2Converting digital numeric data to spike event dataIBM·Filed 2017·Granted Sep 8, 2020·1 cites·20 claims
- 3767US11238347B2Data distribution in an array of neural network coresIBM·Filed 2018·Granted Feb 1, 2022·1 cites·25 claims
- 3866US12182687B2Data representation for dynamic precision in neural network coresIBM·Filed 2018·Granted Dec 31, 2024·1 cites·22 claims
- 3966US10102474B2Event-based neural network with hierarchical addressing for routing event packets between core circuits of the neural networkIBM·Filed 2014·Granted Oct 16, 2018·3 cites·20 claims
- 4065US11205419B2Low energy deep-learning networks for generating auditory features for audio processing pipelinesIBM·Filed 2018·Granted Dec 21, 2021·1 cites·20 claims
- 4164US11010662B2Massively parallel neural inference computing elementsIBM·Filed 2020·Granted May 18, 2021·0 cites·23 claims
- 4263US9881252B2Converting digital numeric data to spike event dataIBM·Filed 2014·Granted Jan 30, 2018·2 cites·20 claims
- 4362US11184221B2Yield tolerance in a neurosynaptic systemIBM·Filed 2019·Granted Nov 23, 2021·0 cites·20 claims
- 4460US10838860B2Memory-mapped interface to message-passing computing systemsIBM·Filed 2019·Granted Nov 17, 2020·0 cites·20 claims
- 4560US10650301B2Utilizing a distributed and parallel set of neurosynaptic core circuits for neuronal computation and non-neuronal computationIBM·Filed 2014·Granted May 12, 2020·2 cites·16 claims
- 4660US2025377408A1Generating structured test vector sequences for logic verificationIBM·Filed 2024·Application pending·0 cites
- 4759US11341401B2Hardware architecture for simulating a neural network of neuronsIBM·Filed 2019·Granted May 24, 2022·0 cites·12 claims
- 4859US10984307B2Peripheral device interconnections for neurosynaptic systemsIBM·Filed 2019·Granted Apr 20, 2021·0 cites·12 claims
- 4958US10839287B1Globally asynchronous and locally synchronous (GALS) neuromorphic networkIBM·Filed 2018·Granted Nov 17, 2020·0 cites·18 claims
- 5057US9797946B2Initializing and testing integrated circuits with selectable scan chains with exclusive-OR outputsIBM·Filed 2015·Granted Oct 24, 2017·0 cites·18 claims
Showing the top 50 of 83 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →