Inventor · disambiguated record
Andrew Mark Chapman
Also filed as: CHAPMAN ANDREW MARK
10 granted patents·34 citations·filing 2018–2022
85Inventor score
Technology areasG06F
Files withCADENCE DESIGN SYSTEMS INC10
Top patents by PatentIndex Score
10 records- 0196US10963617B1Modifying route topology to fix clock tree violationsCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Mar 30, 2021·11 cites·20 claims
- 0294US11620428B1Post-CTS clock tree restructuringCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Apr 4, 2023·5 cites·20 claims
- 0394US11354479B1Post-CTS clock tree restructuring with ripple moveCADENCE DESIGN SYSTEMS INC·Filed 2021·Granted Jun 7, 2022·5 cites·20 claims
- 0490US10885250B1Clock gate placement with data path awarenessCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Jan 5, 2021·3 cites·20 claims
- 0586US12423501B1Skewing level limited clock treeCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Sep 23, 2025·1 cites·20 claims
- 0684US12061857B1Post-CTS insertion delay and skew target reformulation of clock treeCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Aug 13, 2024·1 cites·20 claims
- 0783US10769345B1Clock tree optimization by moving instances toward core routeCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Sep 8, 2020·4 cites·20 claims
- 0880US10740530B1Clock tree wirelength reduction based on a target offset in connected routesCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Aug 11, 2020·3 cites·20 claims
- 0974US10936783B1Runtime efficient circuit placement search location selectionCADENCE DESIGN SYSTEMS INC·Filed 2020·Granted Mar 2, 2021·1 cites·20 claims
- 1055US12430489B1Restructuring algorithm for including user-specified clock instances in a post-CTS clock treeCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Sep 30, 2025·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →