Inventor · disambiguated record
Antonio Gonzalez
Also filed as: GONZALEZ ANTONIO · GONZALEZ ANTONIO E · GONZÁLEZ ANTONIO
53 granted patents·10 pending applications·1,061 citations·filing 1989–2018
99Inventor score
Top patents by PatentIndex Score
63 records- 0198US7434073B2Frequency and voltage scaling architectureINTEL CORP·Filed 2004·Granted Oct 7, 2008·219 cites·27 claims
- 0297US7194643B2Apparatus and method for an energy efficient clustered micro-architectureINTEL CORP·Filed 2003·Granted Mar 20, 2007·215 cites·17 claims
- 0392US8074110B2Enhancing reliability of a many-core processorVERA XAVIER·Filed 2006·Granted Dec 6, 2011·37 cites·24 claims
- 0492US7930574B2Thread migration to improve power efficiency in a parallel processing environmentINTEL CORP·Filed 2007·Granted Apr 19, 2011·28 cites·18 claims
- 0590US8719806B2Speculative multi-threading for instruction prefetch and/or trace pre-buildWANG HONG·Filed 2010·Granted May 6, 2014·12 cites·14 claims
- 0690US8151094B2Dynamically estimating lifetime of a semiconductor deviceVERA XAVIER·Filed 2005·Granted Apr 3, 2012·23 cites·19 claims
- 0789US8291168B2Disabling cache portions during low voltage operationsWILKERSON CHRISTOPHER·Filed 2011·Granted Oct 16, 2012·12 cites·20 claims
- 0889US7330983B2Temperature-aware steering mechanismINTEL CORP·Filed 2004·Granted Feb 12, 2008·78 cites·26 claims
- 0988US7478198B2Multithreaded clustered microarchitecture with dynamic back-end assignmentINTEL CORP·Filed 2004·Granted Jan 13, 2009·42 cites·47 claims
- 1085US7814339B2Leakage power estimationINTEL CORP·Filed 2006·Granted Oct 12, 2010·15 cites·28 claims
- 1184US7895415B2Cache sharing based thread controlINTEL CORP·Filed 2007·Granted Feb 22, 2011·16 cites·6 claims
- 1283US8612698B2Replacement policy for hot code detectionLOPEZ PEDRO·Filed 2008·Granted Dec 17, 2013·16 cites·18 claims
- 1383US8166323B2Thread migration to improve power efficiency in a parallel processing environmentCAI QIONG·Filed 2011·Granted Apr 24, 2012·7 cites·17 claims
- 1482US7657766B2Apparatus for an energy efficient clustered micro-architectureINTEL CORP·Filed 2007·Granted Feb 2, 2010·11 cites·4 claims
- 1582US7447054B2NBTI-resilient memory cells with NAND gatesINTEL CORP·Filed 2006·Granted Nov 4, 2008·14 cites·20 claims
- 1681US8185700B2Enabling speculative state information in a cache coherency protocolGIMENO CARLOS MADRILES·Filed 2006·Granted May 22, 2012·23 cites·15 claims
- 1781US8166282B2Multi-version register file for multithreading processors with live-in precomputationMADRILES CARLOS·Filed 2004·Granted Apr 24, 2012·47 cites·7 claims
- 1881US8103830B2Disabling cache portions during low voltage operationsWILKERSON CHRISTOPHER·Filed 2008·Granted Jan 24, 2012·9 cites·20 claims
- 1980US8090996B2Detecting soft errors via selective re-executionVERA XAVIER·Filed 2006·Granted Jan 3, 2012·9 cites·21 claims
- 2077US8909902B2Systems, methods, and apparatuses to decompose a sequential program into multiple threads, execute said threads, and reconstruct the sequential executionLATORRE FERNANDO·Filed 2009·Granted Dec 9, 2014·10 cites·13 claims
- 2176US8261046B2Access of register files of other threads using synchronizationGIBERT ENRIC·Filed 2006·Granted Sep 4, 2012·12 cites·22 claims
- 2276US7313675B2Register allocation techniqueINTEL CORP·Filed 2005·Granted Dec 25, 2007·8 cites·21 claims
- 2375US8423716B2Multithreaded clustered microarchitecture with dynamic back-end assignmentLATORRE FERNANDO·Filed 2011·Granted Apr 16, 2013·3 cites·19 claims
- 2475US7689804B2Selectively protecting a register fileINTEL CORP·Filed 2006·Granted Mar 30, 2010·7 cites·22 claims
- 2574US9678878B2Disabling cache portions during low voltage operationsWILKERSON CHRISTOPHER·Filed 2012·Granted Jun 13, 2017·3 cites·5 claims
- 2674US7665000B2Meeting point thread characterizationINTEL CORP·Filed 2007·Granted Feb 16, 2010·7 cites·15 claims
- 2774US7600145B2Clustered variations-aware architectureINTEL CORP·Filed 2005·Granted Oct 6, 2009·7 cites·27 claims
- 2874US7558992B2Reducing the soft error vulnerability of stored dataINTEL CORP·Filed 2005·Granted Jul 7, 2009·7 cites·21 claims
- 2974US7458065B2Selection of spawning pairs for a speculative multithreaded processorINTEL CORP·Filed 2004·Granted Nov 25, 2008·24 cites·25 claims
- 3073US7814469B2Speculative multi-threading for instruction prefetch and/or trace pre-buildINTEL CORP·Filed 2003·Granted Oct 12, 2010·13 cites·20 claims
- 3172US8806491B2Thread migration to improve power efficiency in a parallel processing environmentCAI QIONG·Filed 2012·Granted Aug 12, 2014·4 cites·20 claims
- 3271US10528473B2Disabling cache portions during low voltage operationsINTEL CORP·Filed 2017·Granted Jan 7, 2020·1 cites·13 claims
- 3368US9940138B2Utilization of register checkpointing mechanism with pointer swapping to resolve multithreading mis-speculationsLOPEZ PEDRO·Filed 2009·Granted Apr 10, 2018·5 cites·20 claims
- 3468US9047014B2Frequency and voltage scaling architectureINTEL CORP·Filed 2014·Granted Jun 2, 2015·1 cites·20 claims
- 3568US7577015B2Memory content inverting to minimize NTBI effectsINTEL CORP·Filed 2007·Granted Aug 18, 2009·4 cites·9 claims
- 3666US9811341B2Managed instruction cache prefetchingSTAVROU KYRIAKOS A·Filed 2011·Granted Nov 7, 2017·4 cites·5 claims
- 3766US8190652B2Achieving coherence between dynamically optimized code and original codeLATORRE FERNANDO·Filed 2007·Granted May 29, 2012·4 cites·10 claims
- 3865US7698512B2Compressing address communications between processorsINTEL CORP·Filed 2007·Granted Apr 13, 2010·3 cites·28 claims
- 3963US4967158APortable detector device for detecting partial electrical discharge in live voltage distribution cables and/or equipmentHYDRO QUEBEC·Filed 1989·Granted Oct 30, 1990·19 cites·14 claims
- 4062US10621092B2Merging level cache and data cache units having indicator bits related to speculative executionINTEL CORP·Filed 2014·Granted Apr 14, 2020·1 cites·20 claims
- 4161US8352812B2Protecting data storage structures from intermittent errorsINTEL CORP·Filed 2007·Granted Jan 8, 2013·2 cites·5 claims
- 4261US7996617B2Multithreaded clustered microarchitecture with dynamic back-end assignmentINTEL CORP·Filed 2009·Granted Aug 9, 2011·1 cites·51 claims
- 4359US10013326B2Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code regionMARTINEZ RAUL·Filed 2011·Granted Jul 3, 2018·1 cites·18 claims
- 4459US5191914ARedundant valve disconnect couplingFAIRCHILD SPACE AND DEFENSE CO·Filed 1991·Granted Mar 9, 1993·24 cites·8 claims
- 4558US5711877AEtched disc with crosshatch patternVACCO IND·Filed 1996·Granted Jan 27, 1998·23 cites·20 claims
- 4657US7024542B2System and method of reducing the number of copies from alias registers to real registers in the commitment of instructionsINTEL CORP·Filed 2002·Granted Apr 4, 2006·5 cites·24 claims
- 4756US8407497B2Frequency and voltage scaling architectureMAGKLIS GRIGORIOS·Filed 2008·Granted Mar 26, 2013·1 cites·20 claims
- 4855US8689029B2Frequency and voltage scaling architectureINTEL CORP·Filed 2013·Granted Apr 1, 2014·0 cites·20 claims
- 4954US5917420ASmoke/fire detector for the hearing impairedFiled 1997·Granted Jun 29, 1999·22 cites·11 claims
- 5052US2019004916A1Profiling asynchronous events resulting from the execution of software at code region granularityINTEL CORP·Filed 2018·Application pending·0 cites
Showing the top 50 of 63 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →