Inventor · disambiguated record
Andrew Hildebrant
Also filed as: HILDEBRANT ANDREW S · HILDEBRANT ANDREW STEVEN
10 granted patents·93 citations·filing 2003–2006
87Inventor score
Files withAGILENT TECHNOLOGIES INC4VERIGY IPCO2VERIGY PTE LTD SINGAPORE2HILDEBRANT ANDREW S1VERIGY PTE LTD1
Top patents by PatentIndex Score
10 records- 0189US7181663B2Wireless no-touch testing of integrated circuitsVERIGY PTE LTD·Filed 2004·Granted Feb 20, 2007·52 cites·13 claims
- 0275US7137083B2Verification of integrated circuit tests using test simulation and integrated circuit simulation with simulated failureVERIGY IPCO·Filed 2004·Granted Nov 14, 2006·20 cites·30 claims
- 0366US8010933B2Source synchronous timing extraction, cyclization and samplingVERIGY PTE LTD SINGAPORE·Filed 2006·Granted Aug 30, 2011·4 cites·12 claims
- 0450US7146539B2Systems and methods for testing a device-under-testVERIGY IPCO·Filed 2003·Granted Dec 5, 2006·3 cites·20 claims
- 0548US8769361B2Cost estimation for device testingHILDEBRANT ANDREW S·Filed 2003·Granted Jul 1, 2014·0 cites·17 claims
- 0648US7010453B2Methods and apparatus for optimizing lists of waveformsAGILENT TECHNOLOGIES INC·Filed 2003·Granted Mar 7, 2006·4 cites·23 claims
- 0747US7404109B2Systems and methods for adaptively compressing test dataVERIGY PTE LTD SINGAPORE·Filed 2003·Granted Jul 22, 2008·5 cites·8 claims
- 0843US7100132B2Source synchronous timing extraction, cyclization and samplingAGILENT TECHNOLOGIES INC·Filed 2004·Granted Aug 29, 2006·4 cites·20 claims
- 0940US7100098B2Systems and methods for testing performance of an electronic deviceAGILENT TECHNOLOGIES INC·Filed 2003·Granted Aug 29, 2006·1 cites·19 claims
- 1035US6944558B2Methods and apparatus for optimizing the masking of waveforms to reduce the number of waveforms in a list of waveformsAGILENT TECHNOLOGIES INC·Filed 2003·Granted Sep 13, 2005·0 cites·24 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →