Inventor · disambiguated record
Andreas Kerber
Also filed as: KERBER ANDREAS
10 granted patents·6 pending applications·40 citations·filing 2008–2024
85Inventor score
Files withGLOBALFOUNDRIES INC9ADVANCED MICRO DEVICES INC2Intel NDTM US LLC2CARTIER EDUARD ALBERT1KERBER ANDREAS1
Top patents by PatentIndex Score
16 records- 0194US10126354B1Assessment of HCI in logic circuits based on AC stress in discrete FETsGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 13, 2018·15 cites·20 claims
- 0284US8610188B2Integrated circuit decoupling capacitor arrangementKERBER ANDREAS·Filed 2011·Granted Dec 17, 2013·13 cites·10 claims
- 0382US9702926B2Methods, apparatus and system for screening process splits for technology developmentGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 11, 2017·4 cites·20 claims
- 0480US2024243735A1Improved diagnostic ring oscillator circuit for dc and transient characterizationIntel NDTM US LLC·Filed 2024·Application pending·0 cites
- 0575US12467974B2Diagnostic ring oscillator circuit for DC and transient characterizationIntel NDTM US LLC·Filed 2023·Granted Nov 11, 2025·0 cites·20 claims
- 0665US8778750B2Techniques for the fabrication of thick gate dielectricCARTIER EDUARD ALBERT·Filed 2012·Granted Jul 15, 2014·3 cites·19 claims
- 0765US7880236B2Semiconductor circuit including a long channel device and a short channel deviceADVANCED MICRO DEVICES INC·Filed 2008·Granted Feb 1, 2011·3 cites·18 claims
- 0864US9599656B2Methods, apparatus and system for voltage ramp testingGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 21, 2017·1 cites·20 claims
- 0959US10054630B2Methods, apparatus and system for screening process splits for technology developmentGLOBALFOUNDRIES INC·Filed 2017·Granted Aug 21, 2018·0 cites·20 claims
- 1052US9324822B2Gate dielectric protection for transistorsGLOBALFOUNDRIES INC·Filed 2014·Granted Apr 26, 2016·0 cites·16 claims
- 1152US8817570B2Devices having bias temperature instability compensationMCMAHON WILLIAM·Filed 2012·Granted Aug 26, 2014·1 cites·18 claims
- 1245US2014110772A1Integrated circuit decoupling capacitor arrangementGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 1345US2016204098A1Gate dielectric protection for transistorsGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 1445US2010038686A1Soi substrates and devices on soi substrates having a silicon nitride diffusion inhibition layer and methods for fabricatingADVANCED MICRO DEVICES INC·Filed 2008·Application pending·0 cites
- 1540US2015377956A1Method and apparatus for inline device characterization and temperature profilingGLOBALFOUNDRIES INC·Filed 2014·Application pending·0 cites
- 1638US2013033285A1Methods for reliability testing of semiconductor devicesGLOBALFOUNDRIES INC·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →