Inventor · disambiguated record
Anshu Mani
Also filed as: MANI ANSHU
4 granted patents·4 citations·filing 2017–2018
60Inventor score
Technology areasG06F
Files withCADENCE DESIGN SYSTEMS INC4
Top patents by PatentIndex Score
4 records- 0176US10540464B1Critical path aware voltage drop analysis of an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Jan 21, 2020·3 cites·20 claims
- 0264US10460055B1Modeling of sequential circuit devices of multi-clock domain IC design for a transient vectorless power analysisCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Oct 29, 2019·1 cites·20 claims
- 0347US10586000B1Current modeling processCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Mar 10, 2020·0 cites·20 claims
- 0437US10387595B1Systems and methods for modeling integrated clock gates activity for transient vectorless power analysis of an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Aug 20, 2019·0 cites·20 claims
Join the waitlist — get patent alerts
Get an alert when Anshu Mani files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →