Inventor · disambiguated record
Arnaud Pedenon
Also filed as: PEDENON ARNAUD
4 granted patents·27 citations·filing 1999–2018
74Inventor score
Top patents by PatentIndex Score
4 records- 0180US10657302B1Route generation and buffer placement for disjointed power domains in an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted May 19, 2020·5 cites·20 claims
- 0278US8418094B2Methods, systems, and computer program product for parallelizing tasks in processing an electronic circuit designPEDENON ARNAUD·Filed 2011·Granted Apr 9, 2013·8 cites·20 claims
- 0376US8099693B2Methods, systems, and computer program product for parallelizing tasks in processing an electronic circuit designPEDENON ARNAUD·Filed 2008·Granted Jan 17, 2012·11 cites·38 claims
- 0428US7143020B1Method and system for generic inference of sequential elementsCADENCE DESIGN SYSTEMS INC·Filed 1999·Granted Nov 28, 2006·3 cites·28 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →