Inventor · disambiguated record
Avnish Varma
Also filed as: VARMA AVNISH
3 granted patents·7 citations·filing 2017–2018
58Inventor score
Technology areasG06F
Files withCADENCE DESIGN SYSTEMS INC3
Top patents by PatentIndex Score
3 records- 0178US10515174B1Interface modeling for power analysis of an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Dec 24, 2019·4 cites·20 claims
- 0276US10540464B1Critical path aware voltage drop analysis of an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Jan 21, 2020·3 cites·20 claims
- 0337US10387595B1Systems and methods for modeling integrated clock gates activity for transient vectorless power analysis of an integrated circuitCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Aug 20, 2019·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →