Inventor · disambiguated record
Benjamin Gamsa
Also filed as: GAMSA BENJAMIN · Gamsa Benjamin Michael Joshua
13 granted patents·40 citations·filing 2012–2018
89Inventor score
Top patents by PatentIndex Score
13 records- 0191US9529952B1Speculative circuit design component graphical user interfaceALTERA CORP·Filed 2015·Granted Dec 27, 2016·8 cites·19 claims
- 0286US9971858B1Method and apparatus for performing register retiming in the presence of false path timing analysis exceptionsALTERA CORP·Filed 2015·Granted May 15, 2018·5 cites·22 claims
- 0383US10339244B1Method and apparatus for implementing user-guided speculative register retiming in a compilation flowALTERA CORP·Filed 2015·Granted Jul 2, 2019·4 cites·19 claims
- 0483US9710591B1Method and apparatus for performing register retiming in the presence of timing analysis exceptionsALTERA CORP·Filed 2015·Granted Jul 18, 2017·4 cites·24 claims
- 0579US8813018B1Method and apparatus for automatically configuring memory sizeGAMSA BENJAMIN·Filed 2012·Granted Aug 19, 2014·8 cites·17 claims
- 0678US10339238B2Method and apparatus for performing register retiming in the presence of timing analysis exceptionsALTERA CORP·Filed 2017·Granted Jul 2, 2019·2 cites·24 claims
- 0775US8929152B1Retiming programmable devices incorporating random access memoriesALTERA CORP·Filed 2014·Granted Jan 6, 2015·4 cites·20 claims
- 0869US9489480B1Techniques for compiling and generating a performance analysis for an integrated circuit designALTERA CORP·Filed 2014·Granted Nov 8, 2016·2 cites·18 claims
- 0969US9251876B1Retiming programmable devices incorporating random access memoriesALTERA CORP·Filed 2014·Granted Feb 2, 2016·2 cites·20 claims
- 1060US10586004B2Method and apparatus for utilizing estimations for register retiming in a design compilation flowALTERA CORP·Filed 2015·Granted Mar 10, 2020·1 cites·20 claims
- 1158US10671781B2Method and apparatus for performing register retiming in the presence of false path timing analysis exceptionsALTERA CORP·Filed 2018·Granted Jun 2, 2020·0 cites·21 claims
- 1255US10157250B1Speculative circuit design component graphical user interfaceALTERA CORP·Filed 2016·Granted Dec 18, 2018·0 cites·20 claims
- 1344US10152565B2Methods for performing register retiming operations into synchronization regions interposed between circuits associated with different clock domainsALTERA CORP·Filed 2015·Granted Dec 11, 2018·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →