Inventor · disambiguated record
Bernhard Sell
Also filed as: SELL BERNHARD
91 granted patents·22 pending applications·835 citations·filing 2000–2024
99Inventor score
Top patents by PatentIndex Score
113 records- 0198US12015087B2Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying widthINTEL CORP·Filed 2022·Granted Jun 18, 2024·2 cites·17 claims
- 0298US11164975B2Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying widthINTEL CORP·Filed 2020·Granted Nov 2, 2021·5 cites·20 claims
- 0397US11721630B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2022·Granted Aug 8, 2023·2 cites·20 claims
- 0497US7041568B2Method for the production of a self-adjusted structure on a semiconductor waferINFINEON TECHNOLOGIES AG·Filed 2002·Granted May 9, 2006·212 cites·8 claims
- 0596US8941214B2Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying widthSELL BERNHARD·Filed 2011·Granted Jan 27, 2015·23 cites·15 claims
- 0696US7732285B2Semiconductor device having self-aligned epitaxial source and drain extensionsINTEL CORP·Filed 2007·Granted Jun 8, 2010·41 cites·7 claims
- 0796US7335959B2Device with stepped source/drain region profileINTEL CORP·Filed 2005·Granted Feb 26, 2008·92 cites·24 claims
- 0896US6835417B2Method and device for depositing thin layers via ALD/CVD processes in combination with rapid thermal processesINFINEON TECHNOLOGIES AG·Filed 2003·Granted Dec 28, 2004·115 cites·13 claims
- 0995US11239238B2Thin film transistor based memory cells on both sides of a layer of logic devicesINTEL CORP·Filed 2019·Granted Feb 1, 2022·13 cites·23 claims
- 1094US12148734B2Transistors, memory cells, and arrangements thereofINTEL CORP·Filed 2020·Granted Nov 19, 2024·3 cites·20 claims
- 1194US11758711B2Thin-film transistor embedded dynamic random-access memory with shallow bitlineINTEL CORP·Filed 2022·Granted Sep 12, 2023·2 cites·20 claims
- 1294US10651310B2Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying widthINTEL CORP·Filed 2019·Granted May 12, 2020·5 cites·24 claims
- 1394US10319843B2Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying widthINTEL CORP·Filed 2016·Granted Jun 11, 2019·6 cites·12 claims
- 1494US10297549B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2018·Granted May 21, 2019·5 cites·20 claims
- 1593US9922930B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2017·Granted Mar 20, 2018·5 cites·20 claims
- 1693US9559060B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2016·Granted Jan 31, 2017·5 cites·20 claims
- 1793US9437546B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2016·Granted Sep 6, 2016·5 cites·14 claims
- 1892US12238913B2Two transistor memory cell using stacked thin-film transistorsINTEL CORP·Filed 2023·Granted Feb 25, 2025·1 cites·26 claims
- 1991US9711410B2Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying widthSELL BERNHARD·Filed 2014·Granted Jul 18, 2017·6 cites·6 claims
- 2091US7663192B2CMOS device and method of manufacturing sameINTEL CORP·Filed 2008·Granted Feb 16, 2010·23 cites·20 claims
- 2191US2025029926A1Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2024·Application pending·0 cites
- 2290US7943469B2Multi-component strain-inducing semiconductor regionsINTEL CORP·Filed 2006·Granted May 17, 2011·22 cites·18 claims
- 2389US9252267B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2014·Granted Feb 2, 2016·5 cites·14 claims
- 2488US8803245B2Method of forming stacked trench contacts and structures formed therebySELL BERNHARD·Filed 2008·Granted Aug 12, 2014·9 cites·17 claims
- 2588US7687364B2Low-k isolation spacers for conductive regionsINTEL CORP·Filed 2006·Granted Mar 30, 2010·13 cites·17 claims
- 2687US7768074B2Dual salicide integration for salicide through trench contacts and structures formed therebyINTEL CORP·Filed 2008·Granted Aug 3, 2010·13 cites·15 claims
- 2786US11329047B2Thin-film transistor embedded dynamic random-access memory with shallow bitlineINTEL CORP·Filed 2018·Granted May 10, 2022·4 cites·25 claims
- 2886US7829943B2Low-k isolation spacers for conductive regionsINTEL CORP·Filed 2009·Granted Nov 9, 2010·10 cites·15 claims
- 2985US12142566B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2023·Granted Nov 12, 2024·0 cites·20 claims
- 3082US12310001B2Decoupling capacitors and methods of fabricationINTEL CORP·Filed 2021·Granted May 20, 2025·1 cites·20 claims
- 3181US11955560B2Passivation layers for thin film transistors and methods of fabricationINTEL CORP·Filed 2020·Granted Apr 9, 2024·1 cites·20 claims
- 3281US11393927B2Memory cells based on thin-film transistorsINTEL CORP·Filed 2018·Granted Jul 19, 2022·2 cites·19 claims
- 3380US11784257B2Semiconductor device having a necked semiconductor body and method of forming semiconductor bodies of varying widthINTEL CORP·Filed 2021·Granted Oct 10, 2023·0 cites·20 claims
- 3479US12376342B2Passivation layers for thin film transistorsINTEL CORP·Filed 2024·Granted Jul 29, 2025·0 cites·20 claims
- 3579US11728335B2Buried channel structure integrated with non-planar structuresINTEL CORP·Filed 2019·Granted Aug 15, 2023·2 cites·21 claims
- 3678US11121073B2Through plate interconnect for a vertical MIM capacitorINTEL CORP·Filed 2018·Granted Sep 14, 2021·2 cites·20 claims
- 3777US6800898B2Integrated circuit configuration and method of fabricating a dram structure with buried bit lines or trench capacitorsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Oct 5, 2004·23 cites·18 claims
- 3877US6620724B1Low resistivity deep trench fill for DRAM and EDRAM applicationsINFINEON TECHNOLOGIES AG·Filed 2002·Granted Sep 16, 2003·23 cites·38 claims
- 3976US11462541B2Memory cells based on vertical thin-film transistorsINTEL CORP·Filed 2018·Granted Oct 4, 2022·2 cites·21 claims
- 4075US12426247B2Capacitor connections in dielectric layersINTEL CORP·Filed 2023·Granted Sep 23, 2025·0 cites·20 claims
- 4175US11335639B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2020·Granted May 17, 2022·0 cites·20 claims
- 4274US7943992B2Metal gate structures with recessed channelINTEL CORP·Filed 2008·Granted May 17, 2011·5 cites·6 claims
- 4373US6633061B2SOI substrate, a semiconductor circuit formed in a SOI substrate, and an associated production methodINFINEON TECHNOLOGIES AG·Filed 2001·Granted Oct 14, 2003·21 cites·9 claims
- 4471US11683929B2Method for making memory cells based on thin-film transistorsINTEL CORP·Filed 2022·Granted Jun 20, 2023·0 cites·20 claims
- 4571US6627940B1Memory cell arrangementINFINEON TECHNOLOGIES AG·Filed 2000·Granted Sep 30, 2003·13 cites·6 claims
- 4669US12205947B2Planar buried channel structure integrated with non-planar structuresINTEL CORP·Filed 2023·Granted Jan 21, 2025·0 cites·22 claims
- 4769US11690211B2Thin film transistor based memory cells on both sides of a layer of logic devicesINTEL CORP·Filed 2021·Granted Jun 27, 2023·0 cites·19 claims
- 4869US10784201B2Method of forming stacked trench contacts and structures formed therebyINTEL CORP·Filed 2019·Granted Sep 22, 2020·0 cites·20 claims
- 4968US12176284B2Through plate interconnect for a vertical MIM capacitorINTEL CORP·Filed 2021·Granted Dec 24, 2024·0 cites·20 claims
- 5068US6504200B2DRAM cell configuration and fabrication methodINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jan 7, 2003·11 cites·12 claims
Showing the top 50 of 113 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →