Inventor · disambiguated record
Bertrand J. Williams
Also filed as: WILLIAMS BERTRAND J · WILLIAMS BERTRAND JEFFREY
16 granted patents·3 pending applications·369 citations·filing 1985–2020
94Inventor score
Files withCYPRESS SEMICONDUCTOR CORP6ADVANCED MICRO DEVICES INC4MCCASLIN SHAWN R3WILLIAMS BERTRAND J3CYPRESS SEMICONDUCTOR INC1
Top patents by PatentIndex Score
19 records- 0197US5355097APotentiometric oscillator with reset and test inputCYPRESS SEMICONDUCTOR CORP·Filed 1992·Granted Oct 11, 1994·128 cites·14 claims
- 0286US9106105B2Regulation of inverter DC input voltage in photovoltaic arraysMCCASLIN SHAWN R·Filed 2012·Granted Aug 11, 2015·16 cites·35 claims
- 0381US5298810ABiCMOS CMOS/ECL data multiplexerCYPRESS SEMICONDUCTOR CORP·Filed 1992·Granted Mar 29, 1994·36 cites·21 claims
- 0475US9142960B2Constraint weighted regulation of DC/DC convertersWILLIAMS BERTRAND J·Filed 2011·Granted Sep 22, 2015·6 cites·17 claims
- 0575US5592125AModified bang-bang phase detector with ternary outputCYPRESS SEMICONDUCTOR CORP·Filed 1995·Granted Jan 7, 1997·34 cites·4 claims
- 0672US8970068B2Pseudo-random bit sequence generation for maximum power point tracking in photovoltaic arraysMCCASLIN SHAWN R·Filed 2012·Granted Mar 3, 2015·5 cites·36 claims
- 0769US5015970AClock recovery phase lock loop having digitally range limited operating windowADVANCED MICRO DEVICES INC·Filed 1990·Granted May 14, 1991·64 cites·25 claims
- 0868US5640523AMethod and apparatus for a pulsed tri-state phase detector for reduced jitter clock recoveryCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Jun 17, 1997·23 cites·14 claims
- 0956US4639661APower-down arrangement for an ECL circuitADVANCED MICRO DEVICES INC·Filed 1985·Granted Jan 27, 1987·11 cites·20 claims
- 1055US5502405AMethod and apparatus for CML/EC to CMOS/TTL translatorsCYPRESS SEMICONDUCTOR CORP·Filed 1994·Granted Mar 26, 1996·12 cites·17 claims
- 1155US4678944ACircuit for improving performance of an ECL-to-TTL translatorADVANCED MICRO DEVICES INC·Filed 1985·Granted Jul 7, 1987·11 cites·12 claims
- 1253US8975783B2Dual-loop dynamic fast-tracking MPPT control method, device, and systemWILLIAMS BERTRAND J·Filed 2011·Granted Mar 10, 2015·1 cites·23 claims
- 1353US8716999B2Dynamic frequency and pulse-width modulation of dual-mode switching power controllers in photovoltaic arraysWILLIAMS BERTRAND J·Filed 2012·Granted May 6, 2014·1 cites·22 claims
- 1450US5767713APhase locked loop having integration gain reductionCYPRESS SEMICONDUCTOR INC·Filed 1995·Granted Jun 16, 1998·13 cites·14 claims
- 1546US4626771AECL slave reference generatorADVANCED MICRO DEVICES INC·Filed 1985·Granted Dec 2, 1986·7 cites·20 claims
- 1645US2014306542A1Switch Disconnect Circuit for Solar ArraysDRAKER INC·Filed 2013·Application pending·0 cites
- 1741US2021281103A1Integrated Solar PV Module-Level Energy Storage and Associated Power Control SystemYOTTA SOLAR INC·Filed 2020·Application pending·0 cites
- 1839US2012319489A1Power Shuffling Solar String Equalization SystemMCCASLIN SHAWN R·Filed 2012·Application pending·0 cites
- 1929US5818272ADigital integration gain reduction methodCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Oct 6, 1998·1 cites·26 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →