Inventor · disambiguated record
Biswanath Senapati
Also filed as: SENAPATI BISWANATH
6 granted patents·17 pending applications·16 citations·filing 2014–2024
76Inventor score
Top patents by PatentIndex Score
23 records- 0193US12148682B2Memory cell in wafer backsideIBM·Filed 2021·Granted Nov 19, 2024·2 cites·7 claims
- 0285US10276700B2Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistorsGLOBALFOUNDRIES INC·Filed 2018·Granted Apr 30, 2019·4 cites·9 claims
- 0381US9230913B1Metallization layers configured for reduced parasitic capacitanceGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 5, 2016·6 cites·20 claims
- 0480US9966459B2Symmetrical lateral bipolar junction transistor and use of same in characterizing and protecting transistorsGLOBALFOUNDRIES INC·Filed 2014·Granted May 8, 2018·4 cites·5 claims
- 0569US12500144B2Backside self aligned skip viaIBM·Filed 2023·Granted Dec 16, 2025·0 cites·20 claims
- 0660US12424550B2Buried metal signal rail for memory arraysIBM·Filed 2022·Granted Sep 23, 2025·0 cites·7 claims
- 0759US2025300076A1Stacked complimentary metal-oxide semiconductor structureIBM·Filed 2024·Application pending·0 cites
- 0859US2025118630A1Dual side stacked transistorIBM·Filed 2023·Application pending·0 cites
- 0955US2025107197A1Spacer to avoid source and drain shortingIBM·Filed 2023·Application pending·0 cites
- 1055US2025072113A1Stacked FET With Local ContactIBM·Filed 2023·Application pending·0 cites
- 1155US2024178050A1Adjacent buried power rail for stacked field-effect transistor architectureIBM·Filed 2022·Application pending·0 cites
- 1255US2024421156A1Stacked transistor structures with hybrid gate pitchIBM·Filed 2023·Application pending·0 cites
- 1355US2025194242A1Lateral passive diodes co-integrated with nanosheet technologyIBM·Filed 2023·Application pending·0 cites
- 1455US2025192054A1Second air gap type for subtractive interconnectsIBM·Filed 2023·Application pending·0 cites
- 1555US2025081525A1Via To Avoid Local Interconnect ShortingIBM·Filed 2023·Application pending·0 cites
- 1654US2025031430A1Extended backside contact in stack nanosheetIBM·Filed 2023·Application pending·0 cites
- 1754US2025125261A1Semiconductor structures with multi-stage viasIBM·Filed 2023·Application pending·0 cites
- 1854US2024162118A1Backside skip-level through via for backside signal line connectionIBM·Filed 2022·Application pending·0 cites
- 1953US2024421037A1Source/drain protection using a backside placeholderIBM·Filed 2023·Application pending·0 cites
- 2052US2024220696A1Cell-based signal connectivity between wafer frontside and backsideIBM·Filed 2022·Application pending·0 cites
- 2152US2025185377A1Co-integration of passive device and vertically stacked nanosheetsIBM·Filed 2023·Application pending·0 cites
- 2252US2025212506A1Split gate contacts for vertically stacked transistorsIBM·Filed 2023·Application pending·0 cites
- 2351US2025006736A1Stacked nanosheet fets with gate dielectric fillIBM·Filed 2023·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →