Inventor · disambiguated record
Brian Bailey
Also filed as: BAILEY BRIAN · BAILEY BRIAN T
9 granted patents·212 citations·filing 1995–2014
89Inventor score
Technology areasG06F
Top patents by PatentIndex Score
9 records- 0177US8886509B2Coherent state among multiple simulation models in an EDA simulation environmentBAILEY BRIAN·Filed 2011·Granted Nov 11, 2014·4 cites·14 claims
- 0277US7401015B1Coherent state among multiple simulation models in an EDA simulation environmentBAILEY BRIAN·Filed 2001·Granted Jul 15, 2008·23 cites·27 claims
- 0377US6356862B2Hardware and software co-verification employing deferred synchronizationFiled 1998·Granted Mar 12, 2002·103 cites·36 claims
- 0475US7072820B1Accessing state information in a hardware/software co-simulationBAILEY BRIAN·Filed 2000·Granted Jul 4, 2006·28 cites·27 claims
- 0565US7260517B2Synchronization of multiple simulation domains in an EDA simulation environmentBAILEY BRIAN·Filed 2001·Granted Aug 21, 2007·14 cites·40 claims
- 0663US8046209B2Coherent state among multiple simulation models in an EDA simulation environmentMENTOR GRAPHICS CORP·Filed 2008·Granted Oct 25, 2011·2 cites·16 claims
- 0756US10402519B2Coherent state among multiple simulation models in an EDA simulation environmentMENTOR GRAPHICS CORP·Filed 2014·Granted Sep 3, 2019·0 cites·16 claims
- 0853US5872953ASimulating circuit design on a circuit emulation systemMENTOR GRAPHICS CORP·Filed 1995·Granted Feb 16, 1999·32 cites·35 claims
- 0941USD476583SHardware sizing toolBAILEY LLOYD T·Filed 2002·Granted Jul 1, 2003·6 cites·1 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →