Inventor · disambiguated record
Bryan Black
Also filed as: BLACK BRYAN · BLACK BRYAN P
21 granted patents·6 pending applications·639 citations·filing 1994–2010
96Inventor score
Top patents by PatentIndex Score
27 records- 0195US8032711B2Prefetching from dynamic random access memory to a static random access memoryINTEL CORP·Filed 2006·Granted Oct 4, 2011·86 cites·18 claims
- 0294US7692946B2Memory array on more than one dieINTEL CORP·Filed 2007·Granted Apr 6, 2010·40 cites·22 claims
- 0393US8110899B2Method for incorporating existing silicon die into 3D integrated stackREED PAUL A·Filed 2006·Granted Feb 7, 2012·54 cites·18 claims
- 0490US8860199B2Multi-die processorBLACK BRYAN P·Filed 2009·Granted Oct 14, 2014·35 cites·16 claims
- 0587US7620781B2Efficient Bloom filterINTEL CORP·Filed 2006·Granted Nov 17, 2009·23 cites·25 claims
- 0686US5530825AData processor with branch target address cache and method of operationMOTOROLA INC·Filed 1994·Granted Jun 25, 1996·122 cites·4 claims
- 0785US6928645B2Software-based speculative pre-computation and multithreadingINTEL CORP·Filed 2001·Granted Aug 9, 2005·48 cites·16 claims
- 0876US7130990B2Efficient instruction scheduling with lossy tracking of scheduling informationINTEL CORP·Filed 2002·Granted Oct 31, 2006·22 cites·20 claims
- 0974US5805877AData processor with branch target address cache and method of operationMOTOROLA INC·Filed 1996·Granted Sep 8, 1998·69 cites·14 claims
- 1070US7228402B2Predicate register file write by an instruction with a pending instruction having data dependencyINTEL CORP·Filed 2002·Granted Jun 5, 2007·15 cites·20 claims
- 1167US5761723AData processor with branch prediction and method of operationMOTOROLA INC·Filed 1996·Granted Jun 2, 1998·60 cites·14 claims
- 1265US8059441B2Memory array on more than one dieTAUFIQUE MOHAMMED H·Filed 2010·Granted Nov 15, 2011·2 cites·22 claims
- 1361US7428631B2Apparatus and method using different size rename registers for partial-bit and bulk-bit writesINTEL CORP·Filed 2003·Granted Sep 23, 2008·8 cites·14 claims
- 1460US7418551B2Multi-purpose register cacheINTEL CORP·Filed 2004·Granted Aug 26, 2008·7 cites·25 claims
- 1554US5619408AMethod and system for recoding noneffective instructions within a data processing systemIBM·Filed 1995·Granted Apr 8, 1997·24 cites·11 claims
- 1653US6954848B2Marking in history table instructions slowable/delayable for subsequent executions when result is not used immediatelyINTEL CORP·Filed 2002·Granted Oct 11, 2005·3 cites·24 claims
- 1751US7171545B2Predictive filtering of register cache entryINTEL CORP·Filed 2003·Granted Jan 30, 2007·2 cites·24 claims
- 1850US7120749B2Cache mechanismINTEL CORP·Filed 2004·Granted Oct 10, 2006·1 cites·23 claims
- 1947US9977674B2Micro-operation generator for deriving a plurality of single-destination micro-operations from a given predicated instructionRUPLEY II JEFFREY P·Filed 2003·Granted May 22, 2018·3 cites·47 claims
- 2045US2005127490A1Multi-die processorFiled 2003·Application pending·0 cites
- 2143US2004128483A1Fuser renamer apparatus, systems, and methodsINTEL CORP·Filed 2002·Application pending·0 cites
- 2241US2008244224A1Scheduling a direct dependent instructionSASSONE PETER·Filed 2007·Application pending·0 cites
- 2341US2007220207A1Transferring data from stacked memoryBLACK BRYAN·Filed 2006·Application pending·0 cites
- 2440US2004064679A1Hierarchical scheduling windowsFiled 2003·Application pending·0 cites
- 2540US2004064678A1Hierarchical scheduling windowsFiled 2002·Application pending·0 cites
- 2636US5717587AMethod and system for recording noneffective instructions within a data processing systemIBM·Filed 1996·Granted Feb 10, 1998·7 cites·11 claims
- 2735US5613081AMethod of operating a data processor with rapid address comparison for data forwardingMOTOROLA INC·Filed 1995·Granted Mar 18, 1997·8 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →