Inventor · disambiguated record
Bryan W. Chin
Also filed as: CHIN BRYAN · CHIN BRYAN W · Chin Bryan Wai
19 granted patents·1 pending application·160 citations·filing 2007–2019
93Inventor score
Top patents by PatentIndex Score
20 records- 0193US9208103B2Translation bypass in multi-stage address translationCAVIUM INC·Filed 2013·Granted Dec 8, 2015·22 cites·28 claims
- 0292US7613882B1Fast invalidation for cache coherency in distributed shared memory systemLEAF SYSTEMS 3·Filed 2007·Granted Nov 3, 2009·63 cites·20 claims
- 0391US9639476B2Merged TLB structure for multiple sequential address translationsCAVIUM INC·Filed 2013·Granted May 2, 2017·15 cites·45 claims
- 0490US9268694B2Maintenance of cache and tags in a translation lookaside bufferCAVIUM INC·Filed 2013·Granted Feb 23, 2016·14 cites·21 claims
- 0587US9645941B2Collapsed address translation with multiple page sizesCAVIUM INC·Filed 2013·Granted May 9, 2017·10 cites·28 claims
- 0683US8989220B2High speed variable bandwidth ring-based systemSCROBOHACI PAUL G·Filed 2012·Granted Mar 24, 2015·13 cites·36 claims
- 0779US9372800B2Inter-chip interconnect protocol for a multi-chip systemCAVIUM INC·Filed 2014·Granted Jun 21, 2016·5 cites·24 claims
- 0876US10007614B2Method and apparatus for determining metric for selective cachingCAVIUM INC·Filed 2016·Granted Jun 26, 2018·2 cites·26 claims
- 0973US9404970B2Debug interface for multiple CPU coresCAVIUM INC·Filed 2014·Granted Aug 2, 2016·3 cites·30 claims
- 1073US9129060B2QoS based dynamic execution engine selectionANSARI NAJEEB I·Filed 2011·Granted Sep 8, 2015·4 cites·29 claims
- 1169US9703669B2Apparatus and method for distributed instruction trace in a processor systemCAVIUM INC·Filed 2014·Granted Jul 11, 2017·2 cites·19 claims
- 1264US10394730B2Distributed interrupt scheme in a multi-processor systemCAVIUM LLC·Filed 2014·Granted Aug 27, 2019·2 cites·14 claims
- 1364US10216430B2Local ordering of instructions in a computing systemCAVIUM LLC·Filed 2015·Granted Feb 26, 2019·1 cites·20 claims
- 1464US9568944B2Distributed timer subsystem across multiple devicesCAVIUM INC·Filed 2014·Granted Feb 14, 2017·1 cites·18 claims
- 1561US9128769B2Processor with dedicated virtual functions and dynamic assignment of functional resourcesSCHROEDER JEFFREY·Filed 2011·Granted Sep 8, 2015·3 cites·14 claims
- 1655US10782896B2Local instruction ordering based on memory domainsCAVIUM LLC·Filed 2019·Granted Sep 22, 2020·0 cites·36 claims
- 1755US10042778B2Collapsed address translation with multiple page sizesCAVIUM INC·Filed 2017·Granted Aug 7, 2018·0 cites·17 claims
- 1853US9928193B2Distributed timer subsystemCAVIUM INC·Filed 2014·Granted Mar 27, 2018·0 cites·9 claims
- 1946US9495161B2QoS based dynamic execution engine selectionCAVIUM INC·Filed 2015·Granted Nov 15, 2016·0 cites·29 claims
- 2044US2011004729A1Block Caching for Cache-Coherent Distributed Shared Memory3LEAF SYSTEMS INC·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →