Inventor · disambiguated record
Byoung Hun Lee
Also filed as: LEE BYOUNG H · LEE BYOUNG HUN
22 granted patents·15 pending applications·517 citations·filing 1995–2024
95Inventor score
Files withSAMSUNG ELECTRONICS CO LTD11IBM10GWANGJU INST SCIENCE & TECH4POSTECH RES & BUSINESS DEV FOUND3LEE BYOUNG H2
Top patents by PatentIndex Score
37 records- 0197US6653698B2Integration of dual workfunction metal gate CMOS devicesIBM·Filed 2001·Granted Nov 25, 2003·145 cites·9 claims
- 0289US5783022AApparatus and methods for wafer debonding using a liquid jetSAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted Jul 21, 1998·110 cites·19 claims
- 0388US6746924B1Method of forming asymmetric extension mosfet using a drain side spacerIBM·Filed 2003·Granted Jun 8, 2004·45 cites·13 claims
- 0480US6828630B2CMOS device on ultrathin SOI with a deposited raised source/drain, and a method of manufactureIBM·Filed 2003·Granted Dec 7, 2004·23 cites·19 claims
- 0576US6891228B2CMOS device on ultrathin SOI with a deposited raised source/drain, and a method of manufactureIBM·Filed 2004·Granted May 10, 2005·18 cites·6 claims
- 0673US12457901B2Method for manufacturing graphene thermoelectric device and graphene thermoelectric device manufactured therebyPOSTECH RES & BUSINESS DEV FOUND·Filed 2023·Granted Oct 28, 2025·0 cites·3 claims
- 0773US7160771B2Forming gate oxides having multiple thicknessesIBM·Filed 2003·Granted Jan 9, 2007·20 cites·7 claims
- 0872US7649608B2Driving chip, display device having the same, and method of manufacturing the display deviceSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Jan 19, 2010·4 cites·20 claims
- 0972US5863375AApparatus and methods for wafer debonding using a liquid jetSAMSUNG ELECTRONICS CO LTD·Filed 1998·Granted Jan 26, 1999·37 cites·6 claims
- 1071US6800530B2Triple layer hard mask for gate patterning to fabricate scaled CMOS transistorsIBM·Filed 2003·Granted Oct 5, 2004·16 cites·16 claims
- 1171US5735731AWafer polishing deviceSAMSUNG ELECTRONICS CO LTD·Filed 1996·Granted Apr 7, 1998·40 cites·26 claims
- 1266US7943453B2CMOS devices with different metals in gate electrodes using spin on low-k material as hard maskIBM·Filed 2007·Granted May 17, 2011·3 cites·13 claims
- 1364US10109746B2Graphene transistor and ternary logic device using the sameGWANGJU INST SCIENCE & TECH·Filed 2017·Granted Oct 23, 2018·1 cites·15 claims
- 1463US8236686B2Dual metal gates using one metal to alter work function of another metalLEE BYOUNG H·Filed 2008·Granted Aug 7, 2012·4 cites·14 claims
- 1562US7548067B2Methods for measuring capacitanceSEMATECH INC·Filed 2006·Granted Jun 16, 2009·4 cites·8 claims
- 1662US5665631ASOI substrate manufacturing methodSAMSUNG ELECTRONICS CO LTD·Filed 1995·Granted Sep 9, 1997·31 cites·12 claims
- 1760US2024347643A1Anti-ambipolar transistor having vertical structure and method of manufacturing the samePOSTECH RES & BUSINESS DEV FOUND·Filed 2024·Application pending·0 cites
- 1858US2023422529A1Multi-level device and method of manufacturing the samePOSTECH RES & BUSINESS DEV FOUND·Filed 2023·Application pending·0 cites
- 1954US11217709B2Graphene-semiconductor heterojunction photodetector and method of manufacturing the sameGWANGJU INST SCIENCE & TECH·Filed 2020·Granted Jan 4, 2022·0 cites·15 claims
- 2051US5837610AChemical mechanical polishing (CMP) apparatus and CMP method using the sameSAMSUNG ELECTRONICS CO LTD·Filed 1997·Granted Nov 17, 1998·16 cites·8 claims
- 2147US7768620B2Method of fabricating liquid crystal display and liquid crystal display fabricated by the sameSAMSUNG ELECTRONICS CO LTD·Filed 2006·Granted Aug 3, 2010·0 cites·19 claims
- 2247US2021167172A1Graphene semiconductor junction deviceGWANGJU INST SCIENCE & TECH·Filed 2020·Application pending·0 cites
- 2345US10996500B2Optical sheet and backlight unit having sameLMS CO LTD·Filed 2016·Granted May 4, 2021·0 cites·18 claims
- 2445US2015102831A1Method of inspecting a semiconductor device and probing assembly for use thereinSAMSUNG ELECTRONICS CO LTD·Filed 2014·Application pending·0 cites
- 2543US10132984B2Optical sheet assembly and backlight unit comprising sameLMS CO LTD·Filed 2015·Granted Nov 20, 2018·0 cites·13 claims
- 2643US2008251814A1Hetero-bonded semiconductor-on-insulator substrate with an unpinning dielectric layerIBM·Filed 2007·Application pending·0 cites
- 2743US2007031997A1Jig and vacuum equipment for surface adhesion and adhesion method using the vacuum operative adhesionSAMSUNG ELECTRONICS CO LTD·Filed 2006·Application pending·0 cites
- 2843US2008062520A1Method and apparatus for fabricating protection member for display apparatus, method for fabricating display apparatus including the same and display apparatus including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2007·Application pending·0 cites
- 2941US2006101633A1Jig and method of manufacturing a display device using the sameSAMSUNG ELECTRONICS CO LTD·Filed 2005·Application pending·0 cites
- 3038US10243076B2Ternary barristor with schottky junction graphene semiconductorGWANGJU INST SCIENCE & TECH·Filed 2017·Granted Mar 26, 2019·0 cites·7 claims
- 3138US2009039441A1Mosfet with metal gate electrodeLUNA HONGFA·Filed 2007·Application pending·0 cites
- 3238US2012256270A1Dual metal gates using one metal to alter work function of another metalLEE BYOUNG H·Filed 2012·Application pending·0 cites
- 3337US2004259303A1Triple layer hard mask for gate patterning to fabricate scaled CMOS transistorsIBM·Filed 2004·Application pending·0 cites
- 3435US2014176186A1Graphene multiple-valued logic device, operation method thereof, and fabrication method thereofKWANGJU INST SCI & TECH·Filed 2013·Application pending·0 cites
- 3534US2007048920A1Methods for dual metal gate CMOS integrationSEMATECH SARL·Filed 2005·Application pending·0 cites
- 3634US2015154469A1Pattern recognition method and apparatus for the samePOSTECH ACAD IND FOUND·Filed 2014·Application pending·0 cites
- 3733US2005048732A1Method to produce transistor having reduced gate heightIBM·Filed 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →