Inventor · disambiguated record
Chetan Agrawal
Also filed as: AGRAWAL CHETAN
5 granted patents·3 citations·filing 2015–2021
64Inventor score
Top patents by PatentIndex Score
5 records- 0174US9542286B2Failure logging mechanism to reduce garbage collection time in partially reused bad blocksSANDISK TECHNOLOGIES INC·Filed 2015·Granted Jan 10, 2017·3 cites·20 claims
- 0256US10635326B2Method and apparatus for wear-levelling non-volatile memorySANDISK TECHNOLOGIES LLC·Filed 2017·Granted Apr 28, 2020·0 cites·16 claims
- 0354US11507303B2User controlled data-in for lower and middle page in MLC-fine QLC memoriesWESTERN DIGITAL TECH INC·Filed 2021·Granted Nov 22, 2022·0 cites·20 claims
- 0452US11437104B2Storage system and method for a hybrid quad-level cell (QLC) write scheme for reduced random access memory (RAM) footprintWESTERN DIGITAL TECH INC·Filed 2021·Granted Sep 6, 2022·0 cites·20 claims
- 0548US9875039B2Method and apparatus for wear-leveling non-volatile memorySANDISK TECHNOLOGIES INC·Filed 2015·Granted Jan 23, 2018·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →