Inventor · disambiguated record
Chao-Lung Chen
Also filed as: CHEN CHAO-LUNG
7 granted patents·1 pending application·8 citations·filing 2004–2023
76Inventor score
Top patents by PatentIndex Score
8 records- 0184US11309265B2Methods of fabricating semiconductor devices having conductive pad structures with multi-barrier filmsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Apr 19, 2022·3 cites·20 claims
- 0277US12051659B2Semiconductor devices having conductive pad structures with multi-barrier filmsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jul 30, 2024·0 cites·20 claims
- 0373US11688703B2Methods of fabricating semiconductor devices having conductive pad structures with multi-barrier filmsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 27, 2023·0 cites·20 claims
- 0463US12227865B2Plating apparatus and method for electroplating waferTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Feb 18, 2025·0 cites·20 claims
- 0557US11401624B2Plating apparatus and method for electroplating waferTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Aug 2, 2022·0 cites·20 claims
- 0653US7128821B2Electropolishing method for removing particles from wafer surfaceTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Oct 31, 2006·4 cites·19 claims
- 0746US2006237320A1Method for forming a metal layer in multiple stepsTAIWAN SEMICONDUCTOR MFG·Filed 2005·Application pending·0 cites
- 0844US7312149B2Copper plating of semiconductor devices using single intermediate low power immersion stepTAIWAN SEMICONDUCTOR MFG·Filed 2004·Granted Dec 25, 2007·1 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →