Inventor · disambiguated record
Charles S. Chiu
Also filed as: CHIU CHARLES · CHIU CHARLES S
13 granted patents·2 pending applications·181 citations·filing 2000–2021
91Inventor score
Top patents by PatentIndex Score
15 records- 0187US6523150B1Method of designing a voltage partitioned wirebond packageIBM·Filed 2001·Granted Feb 18, 2003·50 cites·27 claims
- 0282US6584596B2Method of designing a voltage partitioned solder-bump packageIBM·Filed 2001·Granted Jun 24, 2003·35 cites·36 claims
- 0380US8312404B2Multi-segments modeling bond wire interconnects with 2D simulations in high speed, high density wire bond packagesHU HAITIAN·Filed 2009·Granted Nov 13, 2012·12 cites·22 claims
- 0479US6584606B1Fast method of I/O circuit placement and electrical rule checkingIBM·Filed 2000·Granted Jun 24, 2003·36 cites·20 claims
- 0572US7809543B2Method, apparatus and computer program product for electrical package modelingIBM·Filed 2007·Granted Oct 5, 2010·7 cites·14 claims
- 0670US6598216B2Method for enhancing a power bus in I/O regions of an ASIC deviceIBM·Filed 2001·Granted Jul 22, 2003·19 cites·4 claims
- 0762US7197446B2Hierarchical method of power supply noise and signal integrity analysisIBM·Filed 2004·Granted Mar 27, 2007·9 cites·30 claims
- 0857US7038319B2Apparatus and method to reduce signal cross-talkIBM·Filed 2003·Granted May 2, 2006·8 cites·9 claims
- 0957US2023357834A1Hybrid protocols and barcoding schemes for multiple sequencing technologiesUNIV CALIFORNIA·Filed 2021·Application pending·0 cites
- 1055US8438520B2Early decoupling capacitor optimization method for hierarchical circuit designCARLSEN KURT A·Filed 2011·Granted May 7, 2013·1 cites·24 claims
- 1149US7110930B2Integrated circuit and package modelingIBM·Filed 2002·Granted Sep 19, 2006·3 cites·15 claims
- 1248US8234611B2System and method for modeling I/O simultaneous switching noiseBREILAND ERIK·Filed 2008·Granted Jul 31, 2012·1 cites·19 claims
- 1342US2009094564A1Method for rapid return path tracingBUDELL TIMOTHY W·Filed 2007·Application pending·0 cites
- 1439US8510697B2System and method for modeling I/O simultaneous switching noiseBREILAND ERIK·Filed 2012·Granted Aug 13, 2013·0 cites·20 claims
- 1539US7000203B2Efficient and comprehensive method to calculate IC package or PCB trace mutual inductance using circular segments and lookup tablesIBM·Filed 2003·Granted Feb 14, 2006·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →