Inventor · disambiguated record
Chaofeng Huang
Also filed as: HUANG CHAOFENG · HUANG CHAOFENG CHARLIE
21 granted patents·3 pending applications·265 citations·filing 1997–2024
95Inventor score
Top patents by PatentIndex Score
24 records- 0197US9046909B2On-chip regulator with variable load compensationLEIBOWITZ BRIAN S·Filed 2012·Granted Jun 2, 2015·36 cites·15 claims
- 0293US10067519B2On-chip regulator with variable load compensationRAMBUS INC·Filed 2017·Granted Sep 4, 2018·11 cites·20 claims
- 0389US11452870B2Nanosecond pulsed power sources having multi-core transformersPULSE BIOSCIENCES INC·Filed 2019·Granted Sep 27, 2022·4 cites·24 claims
- 0488US11766563B2Nanosecond pulsed power sources having multi-core transformersPULSE BIOSCIENCES INC·Filed 2022·Granted Sep 26, 2023·1 cites·25 claims
- 0588US7464282B1Apparatus and method for producing dummy data and output clock generator using sameT RAM SEMICONDUCTOR INC·Filed 2003·Granted Dec 9, 2008·58 cites·20 claims
- 0687US10389224B2Power converter system and method of operating thereofSAMSUNG DISPLAY CO LTD·Filed 2014·Granted Aug 20, 2019·10 cites·21 claims
- 0786US6891774B1Delay line and output clock generator using sameT RAM INC·Filed 2003·Granted May 10, 2005·35 cites·22 claims
- 0880US12447339B2Nanosecond pulsed power sources having multi-core transformersPULSE BIOSCIENCES INC·Filed 2023·Granted Oct 21, 2025·0 cites·20 claims
- 0980US11904164B2Nanosecond pulsed electric field systemPULSE BIOSCIENCES INC·Filed 2020·Granted Feb 20, 2024·1 cites·26 claims
- 1080US9684321B2On-chip regulator with variable load compensationRAMBUS INC·Filed 2015·Granted Jun 20, 2017·4 cites·20 claims
- 1174US8487650B2Methods and circuits for calibrating multi-modal termination schemesFAZEEL HAJEE MOHAMMED SHUAEB·Filed 2012·Granted Jul 16, 2013·8 cites·19 claims
- 1271US8531206B2High resolution output driverAMIRKHANY AMIR·Filed 2010·Granted Sep 10, 2013·5 cites·26 claims
- 1370US2024149062A1Nanosecond pulsed electric field systemPULSE BIOSCIENCES INC·Filed 2024·Application pending·0 cites
- 1469US6947349B1Apparatus and method for producing an output clock pulse and output clock generator using sameT RAM INC·Filed 2003·Granted Sep 20, 2005·17 cites·20 claims
- 1568US9484891B2Multi-modal communication interfaceAMIRKHANY AMIR·Filed 2012·Granted Nov 1, 2016·3 cites·25 claims
- 1668US6734815B1Geometric D/A converter for a delay-locked loopT RAM INC·Filed 2003·Granted May 11, 2004·13 cites·17 claims
- 1766US7089439B1Architecture and method for output clock generation on a high speed memory deviceT RAM INC·Filed 2003·Granted Aug 8, 2006·13 cites·50 claims
- 1866US6977980B2Timing synchronization methods and systems for transmit parallel interfacesRAMBUS INC·Filed 2001·Granted Dec 20, 2005·11 cites·20 claims
- 1961US12465775B2Apparatuses and methods for limiting load current in nanosecond pulsed power sourcesPULSE BIOSCIENCES INC·Filed 2020·Granted Nov 11, 2025·0 cites·25 claims
- 2057US6369626B1Low pass filter for a delay locked loop circuitRAMBUS INC·Filed 1997·Granted Apr 9, 2002·20 cites·21 claims
- 2156US6975260B1Geometric D/A converter for a delay-locked loopT RAM INC·Filed 2004·Granted Dec 13, 2005·8 cites·13 claims
- 2256US6819278B1Geometric D/A converter for a delay-locked loopT RAM INC·Filed 2004·Granted Nov 16, 2004·7 cites·13 claims
- 2345US2009238225A16K pulse repetition rate and above gas discharge laser system solid state pulse power system improvementsCYMER INC·Filed 2009·Application pending·0 cites
- 2441US2007071047A16K pulse repetition rate and above gas discharge laser system solid state pulse power system improvementsCYMER INC·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →