Inventor · disambiguated record
Chung-Ju Lee
Also filed as: LEE CHUNG J · LEE CHUNG-JU
263 granted patents·40 pending applications·5,969 citations·filing 1992–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD216TAIWAN SEMICONDUCTOR MFG42QUESTER TECHNOLOGY INC8UNITED MICROELECTRONICS CORP4VANGUARD INT SEMICONDUCT CORP4
Top patents by PatentIndex Score
303 records- 0199US9576814B2Method of spacer patterning to form a target integrated circuit patternTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Feb 21, 2017·3.1k cites·20 claims
- 0299US9184054B1Method for integrated circuit patterningTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Nov 10, 2015·786 cites·20 claims
- 0399US9153478B2Spacer etching process for integrated circuit designTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Oct 6, 2015·118 cites·20 claims
- 0498US11569124B2Interconnect structure having an etch stop layer over conductive linesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jan 31, 2023·4 cites·20 claims
- 0598US9633999B1Method and structure for semiconductor mid-end-of-line (MEOL) processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Apr 25, 2017·32 cites·20 claims
- 0697US12046551B2Interconnect structure having a barrier layer along the sidewall of self-aligned via structuresTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jul 23, 2024·2 cites·20 claims
- 0797US11302641B2Self-aligned cavity strucutreTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Apr 12, 2022·4 cites·20 claims
- 0897US11171284B2Memory deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 9, 2021·4 cites·20 claims
- 0997US10937652B1Method and structure of cut end with self-aligned double patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Mar 2, 2021·11 cites·20 claims
- 1097US9773676B2Lithography using high selectivity spacers for pitch reductionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Sep 26, 2017·17 cites·19 claims
- 1197US9312220B2Structure and method for a low-K dielectric with pillar-type air-gapsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Apr 12, 2016·30 cites·25 claims
- 1297US9177797B2Lithography using high selectivity spacers for pitch reductionTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Nov 3, 2015·28 cites·20 claims
- 1397US9123776B2Self-aligned double spacer patterning processTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 1, 2015·26 cites·20 claims
- 1497US6051321ALow dielectric constant materials and methodQUESTER TECHNOLOGY INC·Filed 1997·Granted Apr 18, 2000·236 cites·37 claims
- 1596US12424488B2Dual etch-stop layer structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Sep 23, 2025·2 cites·20 claims
- 1696US11798910B2Self-aligned interconnect structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Oct 24, 2023·2 cites·20 claims
- 1796US11631639B2Method of fabricating self-aligned via structuresTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Apr 18, 2023·2 cites·20 claims
- 1896US9418868B1Method of fabricating semiconductor device with reduced trench distortionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Aug 16, 2016·11 cites·20 claims
- 1996US7491615B2Method of fabricating strained-silicon transistors and strained-silicon CMOS transistorsUNITED MICROELECTRONICS CORP·Filed 2005·Granted Feb 17, 2009·54 cites·25 claims
- 2095US11942364B2Selective deposition of a protective layer to reduce interconnect structure critical dimensionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Mar 26, 2024·2 cites·20 claims
- 2195US11362030B2Sidewall spacer structure enclosing conductive wire sidewalls to increase reliabilityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jun 14, 2022·3 cites·20 claims
- 2295US10847417B1Methods of forming interconnect structures in semiconductor fabricationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Nov 24, 2020·12 cites·20 claims
- 2395US8652962B2Etch damage and ESL free dual damascene metal interconnectSINGH SUNIL KUMAR·Filed 2012·Granted Feb 18, 2014·23 cites·10 claims
- 2494US11848207B2Method and structure of cut end with self-aligned double patterningTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Dec 19, 2023·2 cites·20 claims
- 2594US10700264B2Memory device and fabrication method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 30, 2020·4 cites·20 claims
- 2694US10355198B2Memory device and fabrication method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jul 16, 2019·8 cites·20 claims
- 2794US10163887B2Method and structure for semiconductor mid-end-of-line (MEOL) processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 25, 2018·7 cites·20 claims
- 2894US10014175B2Lithography using high selectivity spacers for pitch reductionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jul 3, 2018·7 cites·20 claims
- 2994US9627206B2Method of double patterning lithography process using plurality of mandrels for integrated circuit applicationsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Apr 18, 2017·9 cites·20 claims
- 3094US9437540B2Additional etching to increase via contact areaTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Sep 6, 2016·14 cites·20 claims
- 3194US9431297B2Method of forming an interconnect structure for a semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 30, 2016·15 cites·20 claims
- 3294US8869792B1Portable vaporizerLEE CHUNG JU·Filed 2011·Granted Oct 28, 2014·105 cites·5 claims
- 3394US8518836B1Semiconductor patterningTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted Aug 27, 2013·15 cites·20 claims
- 3493US10818600B2Structure and method for a low-k dielectric with pillar-type air-gapsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Oct 27, 2020·6 cites·20 claims
- 3593US10312139B2Interconnect structure having an etch stop layer over conductive linesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jun 4, 2019·6 cites·20 claims
- 3693US9911646B2Self-aligned double spacer patterning processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Mar 6, 2018·6 cites·20 claims
- 3793US9786549B2Etch damage and ESL free dual damascene metal interconnectTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Oct 10, 2017·6 cites·20 claims
- 3893US9633949B2Copper etching integration schemeTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Apr 25, 2017·7 cites·20 claims
- 3993US9136106B2Method for integrated circuit patterningTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 15, 2015·11 cites·20 claims
- 4093US6086679ADeposition systems and processes for transport polymerization and chemical vapor depositionQUESTER TECHNOLOGY INC·Filed 1997·Granted Jul 11, 2000·137 cites·76 claims
- 4192US11676862B2Semiconductor device structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jun 13, 2023·2 cites·20 claims
- 4292US10636963B2Magnetic tunnel junctionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Apr 28, 2020·7 cites·20 claims
- 4392US9685368B2Interconnect structure having an etch stop layer over conductive linesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Jun 20, 2017·6 cites·20 claims
- 4492US8900989B2Method of fabricating an air gap using a damascene process and structure of sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Dec 2, 2014·11 cites·20 claims
- 4591US11854965B2Sidewall spacer structure enclosing conductive wire sidewalls to increase reliabilityTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 26, 2023·1 cites·20 claims
- 4691US11251118B2Self-aligned via structures with barrier layersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Feb 15, 2022·4 cites·20 claims
- 4791US11183422B2Semiconductor structure and method for manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 23, 2021·2 cites·20 claims
- 4891US10270028B1Memory device and method for manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Apr 23, 2019·7 cites·20 claims
- 4991US10170306B2Method of double patterning lithography process using plurality of mandrels for integrated circuit applicationsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jan 1, 2019·5 cites·20 claims
- 5091US9099400B2Semiconductor device manufacturing methodsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Aug 4, 2015·9 cites·20 claims
Showing the top 50 of 303 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →