Inventor · disambiguated record
Chung-Kai Lin
Also filed as: LIN CHUNG-KAI
15 granted patents·3 pending applications·50 citations·filing 2003–2025
90Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD9TAIWAN SEMICONDUCTOR MFG5CHOU JEN-YEN1HOU YUNG-CHIN1HSIAO CHENG1
Top patents by PatentIndex Score
18 records- 0188US9477803B2Method of generating techfile having reduced corner variation valueTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Oct 25, 2016·9 cites·20 claims
- 0288US8001494B2Table-based DFM for accurate post-layout analysisTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Aug 16, 2011·16 cites·20 claims
- 0381US10521538B2Method and system for integrated circuit design with on-chip variation and spatial correlationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 31, 2019·3 cites·20 claims
- 0476US9245073B2Pattern density-dependent mismatch modeling flowTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Jan 26, 2016·4 cites·15 claims
- 0571US8275584B2Unified model for process variations in integrated circuitsLIN CHUNG-KAI·Filed 2006·Granted Sep 25, 2012·9 cites·25 claims
- 0670US9378314B2Analytical model for predicting current mismatch in metal oxide semiconductor arraysTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jun 28, 2016·2 cites·20 claims
- 0768US10216879B1Method for establishing aging model of device and analyzing aging state of device with aging modelTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Feb 26, 2019·1 cites·20 claims
- 0867US2025287672A1Semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0963US10019545B2Simulation scheme including self heating effectTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jul 10, 2018·2 cites·17 claims
- 1063US8832619B2Analytical model for predicting current mismatch in metal oxide semiconductor arraysTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 9, 2014·1 cites·20 claims
- 1163US8201111B2Table-based DFM for accurate post-layout analysisHOU YUNG-CHIN·Filed 2011·Granted Jun 12, 2012·1 cites·20 claims
- 1262US12336258B2Semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 17, 2025·0 cites·20 claims
- 1361US10860769B2Method and system for integrated circuit design with on-chip variation and spatial correlationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 8, 2020·0 cites·20 claims
- 1453US10169506B2Circuit design method and systemTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 1, 2019·0 cites·20 claims
- 1551US9317647B2Method of designing a circuit and system for implementing the methodTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Apr 19, 2016·0 cites·20 claims
- 1640US6800496B1Characterization methodology for the thin gate oxide deviceTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Oct 5, 2004·2 cites·10 claims
- 1739US2012278050A1Accelerated Generation of Circuit Parameter Distribution Using Monte Carlo SimulationHSIAO CHENG·Filed 2011·Application pending·0 cites
- 1837US2013194213A1Touch-sensing panel and touch-sensing display apparatusCHOU JEN-YEN·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →