Inventor · disambiguated record
Christos Papameletis
Also filed as: PAPAMELETIS CHRISTOS
9 granted patents·13 citations·filing 2017–2022
80Inventor score
Files withCADENCE DESIGN SYSTEMS INC9
Top patents by PatentIndex Score
9 records- 0187US12007440B1Systems and methods for scan chain stitchingCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Jun 11, 2024·1 cites·20 claims
- 0287US11947887B1Test-point flop sharing with improved testability in a circuit designCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Apr 2, 2024·1 cites·20 claims
- 0385US10331506B1SoC top-level XOR compactor design to efficiently test and diagnose multiple identical coresCADENCE DESIGN SYSTEMS INC·Filed 2017·Granted Jun 25, 2019·4 cites·17 claims
- 0482US10955470B1Method to improve testability using 2-dimensional exclusive or (XOR) gridsCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Mar 23, 2021·2 cites·9 claims
- 0582US10775435B1Low-power shift with clock staggeringCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Sep 15, 2020·3 cites·12 claims
- 0677US10761131B1Method for optimally connecting scan segments in two-dimensional compression chainsCADENCE DESIGN SYSTEMS INC·Filed 2018·Granted Sep 1, 2020·2 cites·20 claims
- 0761US12307186B1Launch off shift processCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted May 20, 2025·0 cites·18 claims
- 0858US12412014B1IC chip with IC design modification detectionCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Sep 9, 2025·0 cites·20 claims
- 0955US12511462B1Physical awareness of test-point sharing in a circuit designCADENCE DESIGN SYSTEMS INC·Filed 2022·Granted Dec 30, 2025·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →