Inventor · disambiguated record
Chia-Shiung Tsai
Also filed as: TSAI CHIA S · TSAI CHIA-SHIUNG
499 granted patents·38 pending applications·7,579 citations·filing 1994–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD287TAIWAN SEMICONDUCTOR MFG189CHEN CHI-MING10HSIEH YUAN-CHIH4LIU PING-YIN4
Top patents by PatentIndex Score
537 records- 0199US9711555B2Dual facing BSI image sensors with wafer level stackingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Jul 18, 2017·31 cites·20 claims
- 0299US9355882B2Transfer module for bowed wafersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted May 31, 2016·391 cites·20 claims
- 0399US9257399B23D integrated circuit and methods of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Feb 9, 2016·232 cites·19 claims
- 0499US8802538B1Methods for hybrid wafer bondingTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Aug 12, 2014·269 cites·20 claims
- 0598US10103122B2Hybrid bonding systems and methods for semiconductor wafersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Oct 16, 2018·26 cites·20 claims
- 0698US9443796B2Air trench in packages incorporating hybrid bondingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Sep 13, 2016·221 cites·20 claims
- 0798US8872149B1RRAM structure and process using composite spacerTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Oct 28, 2014·61 cites·20 claims
- 0898US8809123B2Three dimensional integrated circuit structures and hybrid bonding methods for semiconductor wafersLIU PING-YIN·Filed 2012·Granted Aug 19, 2014·238 cites·20 claims
- 0998US8476146B2Reducing wafer distortion through a low CTE layerCHEN CHI-MING·Filed 2010·Granted Jul 2, 2013·134 cites·20 claims
- 1098US6743732B1Organic low K dielectric etch with NH3 chemistryTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Jun 1, 2004·249 cites·7 claims
- 1197US9960129B2Hybrid bonding mechanisms for semiconductor wafersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted May 1, 2018·22 cites·17 claims
- 1297US8053856B1Backside illuminated sensor processingTAIWAN SEMICONDUCTOR MFG·Filed 2010·Granted Nov 8, 2011·26 cites·19 claims
- 1397US6362012B1Structure of merged vertical capacitor inside spiral conductor for RF and mixed-signal applicationsTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Mar 26, 2002·138 cites·23 claims
- 1497US6323121B1Fully dry post-via-etch cleaning method for a damascene processTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Nov 27, 2001·206 cites·22 claims
- 1597US6316348B1High selectivity Si-rich SiON etch-stop layerTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Nov 13, 2001·175 cites·4 claims
- 1697US6271084B1Method of fabricating a metal-insulator-metal (MIM), capacitor structure using a damascene processTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Aug 7, 2001·169 cites·24 claims
- 1797US6037266AMethod for patterning a polysilicon gate with a thin gate oxide in a polysilicon etcherTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Mar 14, 2000·283 cites·16 claims
- 1897US5575706AChemical/mechanical planarization (CMP) apparatus and polish methodTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Nov 19, 1996·255 cites·35 claims
- 1996US10790189B23D integrated circuit and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Sep 29, 2020·9 cites·20 claims
- 2096US10665449B2Integrate rinse module in hybrid bonding platformTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted May 26, 2020·5 cites·20 claims
- 2196US10134945B1Wafer to wafer bonding techniques for III-V wafers and CMOS wafersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Nov 20, 2018·18 cites·20 claims
- 2296US10049890B2Semiconductor structure and method of manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Aug 14, 2018·15 cites·20 claims
- 2396US9853091B2Side bottom contact RRAM structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Dec 26, 2017·16 cites·20 claims
- 2496US9793243B2Buffer layer(s) on a stacked structure having a viaTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Oct 17, 2017·17 cites·20 claims
- 2596US9490158B2Bond chuck, methods of bonding, and tool including bond chuckTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Nov 8, 2016·15 cites·20 claims
- 2696US9431609B2Oxide film scheme for RRAM structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 30, 2016·30 cites·20 claims
- 2796US9257642B1Protective sidewall techniques for RRAMTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Feb 9, 2016·18 cites·19 claims
- 2896US9196825B2Reversed stack MTJTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Nov 24, 2015·13 cites·20 claims
- 2996US9048283B2Hybrid bonding systems and methods for semiconductor wafersLIU PING-YIN·Filed 2012·Granted Jun 2, 2015·22 cites·20 claims
- 3096US9040951B2Resistance variable memory structure and method of forming the sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted May 26, 2015·13 cites·16 claims
- 3196US8816358B1Plasmonic nanostructures for organic image sensorsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Aug 26, 2014·30 cites·20 claims
- 3295US11923237B2Manufacturing method of semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Mar 5, 2024·2 cites·20 claims
- 3395US11495489B2Method for forming a semiconductor-on-insulator (SOI) substrateTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 8, 2022·3 cites·20 claims
- 3495US10614948B2Method for forming inductor structure with magnetic materialTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Apr 7, 2020·3 cites·20 claims
- 3595US9728453B2Methods for hybrid wafer bonding integrated with CMOS processingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Aug 8, 2017·21 cites·19 claims
- 3695US9331032B2Hybrid bonding and apparatus for performing the sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted May 3, 2016·24 cites·20 claims
- 3795US9178144B1RRAM cell with bottom electrodeTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Nov 3, 2015·25 cites·20 claims
- 3895US6514672B2Dry development process for a bi-layer resist systemTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Feb 4, 2003·113 cites·13 claims
- 3994US10553474B1Method for forming a semiconductor-on-insulator (SOI) substrateTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Feb 4, 2020·6 cites·20 claims
- 4094US10354972B2Hybrid bonding systems and methods for semiconductor wafersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jul 16, 2019·7 cites·20 claims
- 4194US9738516B2Structure to reduce backside silicon damageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Aug 22, 2017·9 cites·20 claims
- 4294US9647207B2Resistive random access memory (RRAM) structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted May 9, 2017·11 cites·20 claims
- 4394US9577191B2RRAM cell bottom electrode formationTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Feb 21, 2017·11 cites·20 claims
- 4494US9219109B2Inductor structure with magnetic materialTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Dec 22, 2015·4 cites·20 claims
- 4594US8143683B2In-situ formed capping layer in MTJ devicesWANG YUNG-HUNG·Filed 2010·Granted Mar 27, 2012·40 cites·18 claims
- 4694US7723128B2In-situ formed capping layer in MTJ devicesTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted May 25, 2010·42 cites·18 claims
- 4793US10529916B2Reversed stack MTJTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jan 7, 2020·6 cites·20 claims
- 4893US10003022B2RRAM cell structure with conductive etch-stop layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Jun 19, 2018·8 cites·20 claims
- 4993US9281331B2High dielectric constant structure for the vertical transfer gates of a complementary metal-oxide semiconductor (CMOS) image sensorTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Mar 8, 2016·16 cites·12 claims
- 5093US9159723B2Method for manufacturing semiconductor device and semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Oct 13, 2015·22 cites·19 claims
Showing the top 50 of 537 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →