Inventor · disambiguated record
Chao-Chieh Tsai
Also filed as: TSAI CHAO-CHIEH
23 granted patents·2 pending applications·882 citations·filing 1996–2007
97Inventor score
Files withTAIWAN SEMICONDUCTOR MFG25
Top patents by PatentIndex Score
25 records- 0196US6180445B1Method to fabricate high Q inductor by redistribution layer when flip-chip package is employedTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Jan 30, 2001·149 cites·11 claims
- 0289US6537849B1Seal ring structure for radio frequency integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Mar 25, 2003·63 cites·27 claims
- 0388US6020255ADual damascene interconnect process with borderless contactTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Feb 1, 2000·105 cites·32 claims
- 0486US7265438B2RF seal ring structureTAIWAN SEMICONDUCTOR MFG·Filed 2005·Granted Sep 4, 2007·22 cites·18 claims
- 0586US6376351B1High Fmax RF MOSFET with embedded stack gateTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Apr 23, 2002·44 cites·26 claims
- 0685US6646328B2Chip antenna with a shielding layerTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Nov 11, 2003·38 cites·19 claims
- 0785US6258688B1Method to form a high Q inductorTAIWAN SEMICONDUCTOR MFG·Filed 2000·Granted Jul 10, 2001·42 cites·10 claims
- 0883US6303448B1Method for fabricating raised source/drain structuresTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Oct 16, 2001·55 cites·12 claims
- 0982US6295721B1Metal fuse in copper dual damasceneTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Oct 2, 2001·57 cites·11 claims
- 1080US7081648B2Lossless co-planar wave guide in CMOS processTAIWAN SEMICONDUCTOR MFG·Filed 2002·Granted Jul 25, 2006·25 cites·27 claims
- 1179US6521971B2Metal fuse in copper dual damasceneTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Feb 18, 2003·23 cites·9 claims
- 1278US6083824ABorderless contactTAIWAN SEMICONDUCTOR MFG·Filed 1998·Granted Jul 4, 2000·56 cites·36 claims
- 1377US5648287AMethod of salicidation for deep quarter micron LDD MOSFET devicesTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Jul 15, 1997·64 cites·25 claims
- 1476US6967392B2Seal ring structure for radio frequency integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Nov 22, 2005·20 cites·11 claims
- 1574US6613623B1High fMAX deep submicron MOSFETTAIWAN SEMICONDUCTOR MFG·Filed 2001·Granted Sep 2, 2003·18 cites·45 claims
- 1661US6245637B1STI processTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Jun 12, 2001·19 cites·20 claims
- 1761US5858854AMethod for forming high contrast alignment marksTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Jan 12, 1999·27 cites·20 claims
- 1854US5891771ARecessed structure for shallow trench isolation and salicide processTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Apr 6, 1999·19 cites·10 claims
- 1954US5858846ASalicide integration methodTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted Jan 12, 1999·16 cites·22 claims
- 2052US7061056B2High fMAX deep submicron MOSFETTAIWAN SEMICONDUCTOR MFG·Filed 2003·Granted Jun 13, 2006·4 cites·50 claims
- 2144USRE41668ESeal ring structure for radio frequency integrated circuitsTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted Sep 14, 2010·0 cites·19 claims
- 2241US5982017ARecessed structure for shallow trench isolation and salicide processesTAIWAN SEMICONDUCTOR MFG·Filed 1999·Granted Nov 9, 1999·9 cites·5 claims
- 2339US5726091AMethod of reducing bird's beak of field oxide using reoxidized nitrided pad oxide layerTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Mar 10, 1998·7 cites·27 claims
- 2437US2002192932A1Salicide integration processTAIWAN SEMICONDUCTOR MFG·Filed 2002·Application pending·0 cites
- 2536US2002068385A1Method for forming anchored bond pads in semiconductor devices and devices formedTAIWAN SEMICONDUCTOR MFG·Filed 2000·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →