Inventor · disambiguated record
Changyong Xiao
Also filed as: XIAO CHANGYONG
20 granted patents·4 pending applications·364 citations·filing 2012–2021
94Inventor score
Top patents by PatentIndex Score
24 records- 0198US9171752B1Product comprised of FinFET devices with single diffusion break isolation structures, and methods of making such a productGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 27, 2015·83 cites·17 claims
- 0297US9263516B1Product comprised of FinFET devices with single diffusion break isolation structuresGLOBALFOUNDRIES INC·Filed 2015·Granted Feb 16, 2016·22 cites·11 claims
- 0395US9209186B1Threshold voltage control for mixed-type non-planar semiconductor devicesGLOBALFOUNDRIES INC·Filed 2014·Granted Dec 8, 2015·20 cites·13 claims
- 0495US8617996B1Fin removal methodGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 31, 2013·146 cites·20 claims
- 0594US9419015B1Method for integrating thin-film transistors on an isolation region in an integrated circuit and resulting deviceGLOBALFOUNDRIES INC·Filed 2015·Granted Aug 16, 2016·11 cites·14 claims
- 0694US9123773B1T-shaped single diffusion barrier with single mask approach process flowGLOBALFOUNDRIES INC·Filed 2014·Granted Sep 1, 2015·34 cites·20 claims
- 0793US10032910B2FinFET devices having asymmetrical epitaxially-grown source and drain regions and methods of forming the sameGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 24, 2018·9 cites·10 claims
- 0892US9362284B2Threshold voltage control for mixed-type non-planar semiconductor devicesGLOBALFOUNDRIES INC·Filed 2015·Granted Jun 7, 2016·7 cites·7 claims
- 0992US9123771B2Shallow trench isolation integration methods and devices formed therebyGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 1, 2015·13 cites·19 claims
- 1083US9087720B1Methods for forming FinFETs with reduced series resistanceGLOBALFOUNDRIES INC·Filed 2014·Granted Jul 21, 2015·5 cites·20 claims
- 1182US9385192B2Shallow trench isolation integration methods and devices formed therebyGLOBALFOUNDRIES INC·Filed 2015·Granted Jul 5, 2016·3 cites·7 claims
- 1281US9299608B2T-shaped contacts for semiconductor deviceGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 29, 2016·5 cites·15 claims
- 1371US9159567B1Replacement low-K spacerGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 13, 2015·3 cites·12 claims
- 1468US9508794B2Mixed N/P-type fin semiconductor structure with epitaxial materials having increased surface area through multiple epitaxial headsGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 29, 2016·1 cites·9 claims
- 1566US9275906B2Method for increasing a surface area of epitaxial structures in a mixed N/P type fin semiconductor structure by forming multiple epitaxial headsGLOBALFOUNDRIES INC·Filed 2014·Granted Mar 1, 2016·1 cites·8 claims
- 1657US9123783B2Integrated circuits and methods of forming integrated circuits with interlayer dielectric protectionGLOBALFOUNDRIES INC·Filed 2012·Granted Sep 1, 2015·1 cites·16 claims
- 1753US12068163B2Method for forming semiconductor structureSEMICONDUCTOR MFG INT BEIJING CORP·Filed 2021·Granted Aug 20, 2024·0 cites·19 claims
- 1852US11610980B2Method for processing a FinFET deviceIMEC VZW·Filed 2021·Granted Mar 21, 2023·0 cites·19 claims
- 1950US9793358B2Non-planar semiconductor device with multiple-head epitaxial structure on finGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 17, 2017·0 cites·10 claims
- 2044US2016126336A1Method of improved ca/cb contact and device thereofGLOBALFOUNDRIES INC·Filed 2014·Application pending·0 cites
- 2143US10847425B2Semiconductor devices and fabrication methods thereofSEMICONDUCTOR MFG INT BEIJING CORP·Filed 2019·Granted Nov 24, 2020·0 cites·20 claims
- 2239US2014327139A1Contact liner and methods of fabrication thereofGLOBALFOUNDRIES INC·Filed 2013·Application pending·0 cites
- 2339US2018158821A1Gate structures with low resistanceGLOBALFOUNDRIES INC·Filed 2016·Application pending·0 cites
- 2433US2016315084A1Different height of fins in semiconductor structureGLOBALFOUNDRIES INC·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →