Inventor · disambiguated record
Dae-Hyun Chung
Also filed as: CHUNG DAE HYUN
18 granted patents·1 pending application·219 citations·filing 2000–2017
94Inventor score
Files withSAMSUNG ELECTRONICS CO LTD16GM GLOBAL TECH OPERATIONS LLC1INNOWIRELESS CO LTD1KIM JIN-GOOK1
Top patents by PatentIndex Score
19 records- 0188US7038971B2Multi-clock domain data input-processing device having clock-receiving locked loop and clock signal input method thereofSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted May 2, 2006·50 cites·21 claims
- 0286US8004328B2AC-coupling phase interpolator and delay-locked loop using the sameSAMSUNG ELECTRONICS CO LTD·Filed 2009·Granted Aug 23, 2011·15 cites·11 claims
- 0380US6380799B1Internal voltage generation circuit having stable operating characteristics at low external supply voltagesSAMSUNG ELECTRONICS CO LTD·Filed 2000·Granted Apr 30, 2002·27 cites·13 claims
- 0475US6920080B2Methods for generating output control signals in synchronous semiconductor memory devices and related semiconductor memory devicesSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Jul 19, 2005·22 cites·23 claims
- 0570US8693603B2Semiconductor devices, methods of operating semiconductor devices, and systems having the sameSAMSUNG ELECTRONICS CO LTD·Filed 2012·Granted Apr 8, 2014·3 cites·13 claims
- 0670US6696862B2Semiconductor memory device input circuitSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Feb 24, 2004·21 cites·11 claims
- 0766US7737748B2Level shifter of semiconductor device and method for controlling duty ratio in the deviceSAMSUNG ELECTRONICS CO LTD·Filed 2007·Granted Jun 15, 2010·5 cites·17 claims
- 0866US6327217B1Variable latency buffer circuits, latency determination circuits and methods of operation thereofSAMSUNG ELECTRONICS CO LTD·Filed 2000·Granted Dec 4, 2001·15 cites·42 claims
- 0965US6639868B2SDRAM having data latch circuit for outputting input data in synchronization with a plurality of control signalsSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Oct 28, 2003·14 cites·13 claims
- 1062US8306169B2Semiconductor devices, methods of operating semiconductor devices, and systems having the sameKIM JIN GOOK·Filed 2009·Granted Nov 6, 2012·4 cites·25 claims
- 1160US6882580B2Memory devices having power supply routing for delay locked loops that counteracts power noise effectsSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Apr 19, 2005·11 cites·16 claims
- 1258US7863736B2Semiconductor device and signal terminating method thereofSAMSUNG ELECTRONICS CO LTD·Filed 2008·Granted Jan 4, 2011·1 cites·20 claims
- 1358US6950488B2Delay locked-loop circuit for reducing load of variable delay unit at high-frequency operation and locking external clock signal stablySAMSUNG ELECTRONICS CO LTD·Filed 2001·Granted Sep 27, 2005·10 cites·18 claims
- 1456US6614278B2Pulsed signal transition delay adjusting circuitSAMSUNG ELECTRONICS CO LTD·Filed 2001·Granted Sep 2, 2003·6 cites·20 claims
- 1553US6987407B2Delay locked loops having delay time compensation and methods for compensating for delay time of the delay locked loopsSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Jan 17, 2006·7 cites·20 claims
- 1653US6778464B2Expanded operating frequency synchronous semiconductor memory device having wave pipeline structure and wave pipeline control method thereofSAMSUNG ELECTRONICS CO LTD·Filed 2002·Granted Aug 17, 2004·8 cites·28 claims
- 1745US10384516B2Ventilation nozzle arrangement for a cockpit of a vehicle andvehicle comprising the ventilation nozzle arrangementGM GLOBAL TECH OPERATIONS LLC·Filed 2017·Granted Aug 20, 2019·0 cites·15 claims
- 1837US6812765B2Pulsed signal transition delay adjusting circuitSAMSUNG ELECTRONICS CO LTD·Filed 2003·Granted Nov 2, 2004·0 cites·13 claims
- 1937US2009069006A1Method for remotely logging diagnostic monitoring data for mobile telecommunication networkINNOWIRELESS CO LTD·Filed 2006·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →