Inventor · disambiguated record
Daniel L. Hillman
Also filed as: HILLMAN DANIEL · HILLMAN DANIEL L
37 granted patents·540 citations·filing 1993–2020
98Inventor score
Files withSPIN TRANSFER TECH INC11CONVERSANT INTELLECTUAL PROPERTY MAN INC6MOSAID TECHNOLOGIES CORP5MOSAID TECHNOLOGIES INC5APPLE COMPUTER3
Top patents by PatentIndex Score
37 records- 0198US7051306B2Managing power on integrated circuits using power islandsMOSAID TECHNOLOGIES CORP·Filed 2004·Granted May 23, 2006·126 cites·51 claims
- 0297US7996811B2Power managers for an integrated circuitMOSAID TECHNOLOGIES INC·Filed 2008·Granted Aug 9, 2011·25 cites·74 claims
- 0397US7415680B2Power managers for an integrated circuitMOSAID TECHNOLOGIES CORP·Filed 2006·Granted Aug 19, 2008·37 cites·23 claims
- 0496US7945885B2Power managers for an integrated circuitMOSAID TECHNOLOGIES INC·Filed 2008·Granted May 17, 2011·23 cites·64 claims
- 0595US7348804B2Low leakage and data retention circuitryMOSAID DELAWARE INC·Filed 2007·Granted Mar 25, 2008·25 cites·33 claims
- 0695US7227383B2Low leakage and data retention circuitryMOSAID DELAWARE INC·Filed 2005·Granted Jun 5, 2007·27 cites·16 claims
- 0793US8253438B2Low leakage and data retention circuitryHOBERMAN BARRY A·Filed 2011·Granted Aug 28, 2012·11 cites·19 claims
- 0892US9660616B2Power managers for an integrated circuitCONVERSANT INTELLECTUAL PROPERTY MAN INC·Filed 2015·Granted May 23, 2017·6 cites·16 claims
- 0992US8782590B2Power managers for an integrated circuitHOBERMAN BARRY ALAN·Filed 2011·Granted Jul 15, 2014·9 cites·73 claims
- 1089US9166412B2Power managers for an integrated circuitCONVERSANT INTELLECTUAL PROPERTY MAN INC·Filed 2014·Granted Oct 20, 2015·8 cites·15 claims
- 1187US10749506B2Power managers for an integrated circuitCONVERSANT INTELLECTUAL PROPERTY MAN INC·Filed 2018·Granted Aug 18, 2020·2 cites·5 claims
- 1287US10243542B2Power managers for an integrated circuitCONVERSANT INTELLECTUAL PROPERTY MAN INC·Filed 2017·Granted Mar 26, 2019·3 cites·5 claims
- 1387US8854077B2Low leakage and data retention circuitryHOBERMAN BARRY A·Filed 2012·Granted Oct 7, 2014·5 cites·18 claims
- 1485US10460781B2Memory device with a dual Y-multiplexer structure for performing two simultaneous operations on the same row of a memory bankSPIN TRANSFER TECH INC·Filed 2017·Granted Oct 29, 2019·6 cites·17 claims
- 1584US8762923B2Power managers for an integrated circuitHOBERMAN BARRY ALAN·Filed 2012·Granted Jun 24, 2014·4 cites·39 claims
- 1682US7592837B2Low leakage and data retention circuitryMOSAID TECHNOLOGIES CORP·Filed 2008·Granted Sep 22, 2009·10 cites·63 claims
- 1780US7940081B2Low leakage and data retention circuitryMOSAID TECHNOLOGIES INC·Filed 2009·Granted May 10, 2011·5 cites·20 claims
- 1880US7508256B2Integrated circuit with signal bus formed by cell abutment of logic cellsMOSAID TECHNOLOGIES CORP·Filed 2006·Granted Mar 24, 2009·8 cites·23 claims
- 1979US7443197B2Low leakage and data retention circuitryMOSAID TECHNOLOGIES INC·Filed 2007·Granted Oct 28, 2008·6 cites·47 claims
- 2073US11362645B2Power managers for an integrated circuitMOSAID TECH INCORPORATED·Filed 2020·Granted Jun 14, 2022·0 cites·14 claims
- 2173US5400340AEnd of packet detector and resynchronizer for serial data busesAPPLE COMPUTER·Filed 1993·Granted Mar 21, 1995·61 cites·15 claims
- 2271US5412698AAdaptive data separatorAPPLE COMPUTER·Filed 1993·Granted May 2, 1995·63 cites·21 claims
- 2370US9350349B2Low leakage and data retention circuitryCONVERSANT INTELLECTUAL PROPERTY MAN INC·Filed 2014·Granted May 24, 2016·1 cites·16 claims
- 2470US7541880B2Circuit and method for glitch correctionMOSAID TECHNOLOGIES CORP·Filed 2007·Granted Jun 2, 2009·4 cites·16 claims
- 2568US5493570AEnd of packet detector and resynchronizer for serial data busesAPPLE COMPUTER·Filed 1995·Granted Feb 20, 1996·56 cites·12 claims
- 2667US10446210B2Memory instruction pipeline with a pre-read stage for a write operation for reducing power consumption in a memory device that uses dynamic redundancy registersSPIN TRANSFER TECH INC·Filed 2017·Granted Oct 15, 2019·2 cites·20 claims
- 2767US10437723B2Method of flushing the contents of a dynamic redundancy register to a secure storage area during a power down in a memory deviceSPIN TRANSFER TECH INC·Filed 2017·Granted Oct 8, 2019·2 cites·20 claims
- 2865US8026738B2Integrated circuit with signal bus formed by cell abutment of logic cellsMOSAID TECHNOLOGIES INC·Filed 2009·Granted Sep 27, 2011·2 cites·44 claims
- 2963US10366775B2Memory device using levels of dynamic redundancy registers for writing a data word that failed a write operationSPIN TRANSFER TECH INC·Filed 2017·Granted Jul 30, 2019·1 cites·24 claims
- 3060US10192602B2Smart cache design to prevent overflow for a memory device with a dynamic redundancy registerSPIN TRANSFER TECH INC·Filed 2017·Granted Jan 29, 2019·1 cites·23 claims
- 3159US10192601B2Memory instruction pipeline with an additional write stage in a memory device that uses dynamic redundancy registersSPIN TRANSFER TECH INC·Filed 2017·Granted Jan 29, 2019·1 cites·21 claims
- 3253US9722605B2Low leakage and data retention circuitryCONVERSANT INTELLECTUAL PROPERTY MAN INC·Filed 2016·Granted Aug 1, 2017·0 cites·12 claims
- 3352US10437491B2Method of processing incomplete memory operations in a memory device during a power up sequence and a power down sequence using a dynamic redundancy registerSPIN TRANSFER TECH INC·Filed 2017·Granted Oct 8, 2019·0 cites·20 claims
- 3451US10424393B2Method of reading data from a memory device using multiple levels of dynamic redundancy registersSPIN TRANSFER TECH INC·Filed 2017·Granted Sep 24, 2019·0 cites·25 claims
- 3548US10366774B2Device with dynamic redundancy registersSPIN TRANSFER TECH INC·Filed 2016·Granted Jul 30, 2019·0 cites·24 claims
- 3640US10628316B2Memory device with a plurality of memory banks where each memory bank is associated with a corresponding memory instruction pipeline and a dynamic redundancy registerSPIN TRANSFER TECH INC·Filed 2017·Granted Apr 21, 2020·0 cites·17 claims
- 3738US10360964B2Method of writing contents in memory during a power up sequence using a dynamic redundancy register in a memory deviceSPIN TRANSFER TECH INC·Filed 2017·Granted Jul 23, 2019·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →