Inventor · disambiguated record
Dah-Bin Kao
Also filed as: KAO DAH-BIN
11 granted patents·1 pending application·420 citations·filing 1992–2001
93Inventor score
Files withNAT SEMICONDUCTOR CORP3WINBOND ELECTRONICS CORP3GENUS INC2WINBOND ELECTRONICS CORP AMERI1WINBOND ELECTRONICS CORP I1
Top patents by PatentIndex Score
12 records- 0187US5294568AMethod of selective etching native oxideGENUS INC·Filed 1992·Granted Mar 15, 1994·111 cites·17 claims
- 0281US5986934ASemiconductor memory array with buried drain lines and methods thereforWINBOND ELECTRONICS CORP I·Filed 1997·Granted Nov 16, 1999·56 cites·22 claims
- 0379US5762755AOrganic preclean for improving vapor phase wafer etch uniformityGENUS INC·Filed 1992·Granted Jun 9, 1998·72 cites·7 claims
- 0478US5492847ACounter-implantation method of manufacturing a semiconductor device with self-aligned anti-punchthrough pocketsNAT SEMICONDUCTOR CORP·Filed 1994·Granted Feb 20, 1996·40 cites·25 claims
- 0574US6211547B1Semiconductor memory array with buried drain lines and processing methods thereforWINBOND ELECTRONICS CORP·Filed 1997·Granted Apr 3, 2001·31 cites·6 claims
- 0668US5683941ASelf-aligned polycide process that utilizes a planarized layer of material to expose polysilicon structures to a subsequently deposited metal layer that is reacted to form the metal silicideNAT SEMICONDUCTOR CORP·Filed 1996·Granted Nov 4, 1997·38 cites·71 claims
- 0757US6876031B1Method and apparatus for split gate source side injection flash memory cell and array with dedicated erase gatesWINBOND ELECTRONICS CORP·Filed 1999·Granted Apr 5, 2005·15 cites·5 claims
- 0856US5903487AMemory device and method of operationWINDBOND ELECTRONICS CORP·Filed 1997·Granted May 11, 1999·16 cites·29 claims
- 0956US5759882AMethod of fabricating self-aligned contacts and local interconnects in CMOS and BICMOS processes using chemical mechanical polishing (CMP)NAT SEMICONDUCTOR CORP·Filed 1996·Granted Jun 2, 1998·24 cites·21 claims
- 1046US6274436B1Method for forming minute openings in semiconductor devicesWINBOND ELECTRONICS CORP·Filed 1999·Granted Aug 14, 2001·10 cites·32 claims
- 1142US6323089B1Semiconductor memory array with buried drain lines and processing methods thereforWINBOND ELECTRONICS CORP AMERI·Filed 1999·Granted Nov 27, 2001·7 cites·13 claims
- 1236US2002102774A1Method and apparatus for split gate source side injection flash memory cell and array with dedicated erase gatesFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →