Inventor · disambiguated record
David D. Moser
Also filed as: MOSER DAVID D
9 granted patents·10 pending applications·13 citations·filing 2012–2023
80Inventor score
Top patents by PatentIndex Score
19 records- 0194US11861181B1Triple modular redundancy (TMR) radiation hardened memory systemBAE SYS INF & ELECT SYS INTEG·Filed 2022·Granted Jan 2, 2024·6 cites·20 claims
- 0277US10990727B1Method for radiation hardening of integrated circuitsBAE SYS INF & ELECT SYS INTEG·Filed 2020·Granted Apr 27, 2021·2 cites·20 claims
- 0373US11108383B1Clock phase controlBAE SYS INF & ELECT SYS INTEG·Filed 2020·Granted Aug 31, 2021·1 cites·19 claims
- 0469US10998890B2Radiation-hardened D flip-flop circuitLI BIN·Filed 2017·Granted May 4, 2021·2 cites·13 claims
- 0556US2021257999A1Radiation-hardened d flip-flop circuitBAE SYS INF & ELECT SYS INTEG·Filed 2021·Application pending·0 cites
- 0654US8803579B2Digitally controlled pulse width modulator utilizing real time calibrationMOSER DAVID D·Filed 2012·Granted Aug 12, 2014·2 cites·4 claims
- 0754US2025199955A1Random-access memory scrubbingBAE SYS INF & ELECT SYS INTEG·Filed 2023·Application pending·0 cites
- 0852US12277255B2Secure semiconductor and system designBAE SYS INF & ELECT SYS INTEG·Filed 2022·Granted Apr 15, 2025·0 cites·17 claims
- 0950US2025077755A1Semiconductor device with redacted logicBAE SYS INF & ELECT SYS INTEG·Filed 2023·Application pending·0 cites
- 1046US2023421137A1Polyphase filter for a dynamically reconfigurable oversampled channelizerBAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1145US12253964B2DSP eco system scalable with obfuscationBAE SYS INF & ELECT SYS INTEG·Filed 2022·Granted Mar 18, 2025·0 cites·18 claims
- 1245US2023418898A1Dynamically reconfigurable oversampled channelizerBAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1345US2023418899A1Fast fourier transform (fft) butterfly circuit for a dynamically reconfigurable oversampled channelizerBAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1444US11971845B2DSP encapsulationBAE SYS INF & ELECT SYS INTEG·Filed 2022·Granted Apr 30, 2024·0 cites·16 claims
- 1544US2023366931A1Secure joint test action group (jtag)BAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1644US2023367738A1Asic power controlBAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1744US2023421425A1Fast fourier transform (fft) sample reorder circuit for a dynamically reconfigurable oversampled channelizerBAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1841US2023244824A1Firewall for on-chip signalingBAE SYS INF & ELECT SYS INTEG·Filed 2022·Application pending·0 cites
- 1932US10714207B2Scannable-latch random access memoryBAE SYS INF & ELECT SYS INTEG·Filed 2018·Granted Jul 14, 2020·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →