Inventor · disambiguated record
Daniel Ortega
Also filed as: ORTEGA DANIEL · ORTEGA DANIEL A
13 granted patents·5 pending applications·77 citations·filing 1992–2023
90Inventor score
Files withFARABOSCHI PAOLO3INTEL CORP3GIBERT CODINA ENRIC2HEWLETT PACKARD DEVELOPMENT CO2DEERE & CO1
Top patents by PatentIndex Score
18 records- 0184US12017622B1Systems and methods for a battery exchange systemFORD GLOBAL TECH LLC·Filed 2023·Granted Jun 25, 2024·2 cites·15 claims
- 0277US9145656B2Configurable seat assembly for work vehiclesDEERE & CO·Filed 2014·Granted Sep 29, 2015·9 cites·18 claims
- 0377US8948511B2Automated document processing systemORTEGA DANIEL·Filed 2005·Granted Feb 3, 2015·12 cites·7 claims
- 0477US8291488B2Remote connection between intermediary device and computing device via central authority softwareFARABOSCHI PAOLO·Filed 2007·Granted Oct 16, 2012·8 cites·20 claims
- 0575US8126696B1Modifying length of synchronization quanta of simulation time in which execution of nodes is simulatedFARABOSCHI PAOLO·Filed 2008·Granted Feb 28, 2012·9 cites·15 claims
- 0667US7555419B2Simulation of system execution of instructionsHEWLETT PACKARD DEVELOPMENT CO·Filed 2006·Granted Jun 30, 2009·4 cites·19 claims
- 0766US9811341B2Managed instruction cache prefetchingSTAVROU KYRIAKOS A·Filed 2011·Granted Nov 7, 2017·4 cites·5 claims
- 0863US9098581B2Method for finding text reading order in a documentYACOUB SHERIF·Filed 2005·Granted Aug 4, 2015·3 cites·17 claims
- 0959US10013326B2Propagating a prefetching profile bit from a prefetch queue to a data cache to indicate that a line was prefetched in response to an instruction within a code regionMARTINEZ RAUL·Filed 2011·Granted Jul 3, 2018·1 cites·18 claims
- 1057US5285806AMethod and apparatus for temporarily sealing off pipelinesPUBLIC SERVICE COMPANY OF COLO·Filed 1992·Granted Feb 15, 1994·24 cites·14 claims
- 1156US7912690B2Dynamic sampling of functional simulation to determine whether to perform both functional and timing simulationHEWLETT PACKARD DEVELOPMENT CO·Filed 2007·Granted Mar 22, 2011·1 cites·17 claims
- 1253US9374542B2Image signal processor with a block checking circuitINTEL CORP·Filed 2014·Granted Jun 21, 2016·0 cites·20 claims
- 1352US2019004916A1Profiling asynchronous events resulting from the execution of software at code region granularityINTEL CORP·Filed 2018·Application pending·0 cites
- 1443US2008270959A1Influencing functional simulation of a system by timing simulation of the systemFARABOSCHI PAOLO·Filed 2007·Application pending·0 cites
- 1542US10157063B2Instruction and logic for optimization level aware branch predictionINTEL CORP·Filed 2012·Granted Dec 18, 2018·0 cites·6 claims
- 1638US2013268735A1Support for speculative ownership without dataGIBERT CODINA ENRIC·Filed 2011·Application pending·0 cites
- 1737US2014156976A1Method, apparatus and system for selective execution of a commit instructionGIBERT CODINA ENRIC·Filed 2011·Application pending·0 cites
- 1832US2013326199A1Method and apparatus for controlling a mxcsrMAGKLIS GRIGORIOS·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →