Inventor · disambiguated record
David Power
Also filed as: POWER DAVID · POWER DAVID W
2 granted patents·9 pending applications·178 citations·filing 2005–2024
60Inventor score
Top patents by PatentIndex Score
11 records- 0187US8452654B1System and method for issuing rewards to card holdersWOOTERS D STEPHEN·Filed 2005·Granted May 28, 2013·178 cites·14 claims
- 0263US2025189901A1Critical dimension uniformity tuning based on mask design feature densityTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 0360US12512356B2Apparatus and method for wafer alignmentTOKYO ELECTRON LTD·Filed 2022·Granted Dec 30, 2025·0 cites·20 claims
- 0459US2025308951A1Die to wafer bonding method and apparatus with thermal contactless die shape controlTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 0558US2025259943A1Die shape control for die to wafer bond enhancementTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 0657US2025300010A1Method for patterning for chemical mechanical polishing (cmp) iso-dense bias compensation using z-heightTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 0757US2025306463A1Patterning a substrate using a multi-patterning techniqueTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 0857US2025308949A1Die to wafer bonding method and apparatus with thermal contact die shape controlTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 0956US2025191970A1Fully self-aligned vias using a hardmask and antispacersTOKYO ELECTRON LTD·Filed 2023·Application pending·0 cites
- 1056US2024289529A1Method for cell layoutTOKYO ELECTRON LTD·Filed 2024·Application pending·0 cites
- 1152US2023290676A1Self Aligned Multiple Patterning MethodTOKYO ELECTRON LTD·Filed 2022·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →