Inventor · disambiguated record
Derryl J. Allman
Also filed as: ALLMAN DERRYL D J · ALLMAN DERRYL J
7 granted patents·2 pending applications·80 citations·filing 2001–2005
85Inventor score
Files withLSI LOGIC CORP9
Top patents by PatentIndex Score
9 records- 0187US7358594B1Method of forming a low k polymer E-beam printable mechanical supportLSI LOGIC CORP·Filed 2005·Granted Apr 15, 2008·12 cites·9 claims
- 0278US6551901B1Method for preventing borderless contact to well leakageLSI LOGIC CORP·Filed 2001·Granted Apr 22, 2003·24 cites·2 claims
- 0374US7098515B1Semiconductor chip with borderless contact that avoids well leakageLSI LOGIC CORP·Filed 2005·Granted Aug 29, 2006·10 cites·15 claims
- 0472US6893937B1Method for preventing borderless contact to well leakageLSI LOGIC CORP·Filed 2003·Granted May 17, 2005·17 cites·8 claims
- 0559US6972217B1Low k polymer E-beam printable mechanical supportLSI LOGIC CORP·Filed 2002·Granted Dec 6, 2005·6 cites·21 claims
- 0659US6707132B1High performance Si-Ge device module with CMOS technologyLSI LOGIC CORP·Filed 2002·Granted Mar 16, 2004·10 cites·18 claims
- 0740US2006006538A1Extreme low-K interconnect structure and methodLSI LOGIC CORP·Filed 2004·Application pending·0 cites
- 0839US6767842B2Implementation of Si-Ge HBT with CMOS processLSI LOGIC CORP·Filed 2002·Granted Jul 27, 2004·1 cites·6 claims
- 0935US2004203212A1Implementation of Si-Ge HBT module with CMOS processLSI LOGIC CORP·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →