Inventor · disambiguated record
Debaleena Das
Also filed as: DAS DEBALEENA
21 granted patents·105 citations·filing 2001–2022
93Inventor score
Top patents by PatentIndex Score
21 records- 0195US9691505B2Dynamic application of error correction code (ECC) based on error typeINTEL CORP·Filed 2015·Granted Jun 27, 2017·21 cites·20 claims
- 0294US10496473B2Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC)INTEL CORP·Filed 2017·Granted Dec 3, 2019·11 cites·18 claims
- 0390US9811420B2Extracting selective information from on-die dynamic random access memory (DRAM) error correction code (ECC)INTEL CORP·Filed 2015·Granted Nov 7, 2017·7 cites·16 claims
- 0487US9760435B2Apparatus and method for generating common locator bits to locate a device or column error during error correction operationsINTEL CORP·Filed 2015·Granted Sep 12, 2017·9 cites·22 claims
- 0586US9697094B2Dynamically changing lockstep configurationINTEL CORP·Filed 2015·Granted Jul 4, 2017·9 cites·22 claims
- 0684US10579464B2Method and apparatus for partial cache line sparingINTEL CORP·Filed 2018·Granted Mar 3, 2020·3 cites·26 claims
- 0778US9910728B2Method and apparatus for partial cache line sparingINTEL CORP·Filed 2015·Granted Mar 6, 2018·2 cites·25 claims
- 0878US9195551B2Enhanced storage of metadata utilizing improved error detection and correction in computer memoryDAS DEBALEENA·Filed 2012·Granted Nov 24, 2015·7 cites·22 claims
- 0973US8745464B2Rank-specific cyclic redundancy checkINTEL CORP·Filed 2013·Granted Jun 3, 2014·3 cites·7 claims
- 1071US9391637B2Error correcting code scheme utilizing reserved spaceAGRAWAL RAJAT·Filed 2012·Granted Jul 12, 2016·3 cites·15 claims
- 1169US7530008B2Scalable-chip-correct ECC schemeSUN MICROSYSTEMS INC·Filed 2003·Granted May 5, 2009·22 cites·19 claims
- 1268US9613722B2Method and apparatus for reverse memory sparingINTEL CORP·Filed 2014·Granted Apr 4, 2017·2 cites·24 claims
- 1367US9904591B2Device, system and method to restrict access to data error informationINTEL CORP·Filed 2015·Granted Feb 27, 2018·1 cites·25 claims
- 1465US8527836B2Rank-specific cyclic redundancy checkSUBASHCHANDRABOSE RAMESH·Filed 2011·Granted Sep 3, 2013·2 cites·21 claims
- 1558US12321898B2System and method for generating skill-centric online resumes with verifiable skillsDAS DEBALEENA·Filed 2022·Granted Jun 3, 2025·0 cites·24 claims
- 1652US11210637B2System and method for generating skill-centric online resumes with verifiable skillsSTEM AWAY INC·Filed 2019·Granted Dec 28, 2021·0 cites·19 claims
- 1750US6802036B2High-speed first-in-first-out bufferSUN MICROSYSTEMS INC·Filed 2001·Granted Oct 5, 2004·3 cites·16 claims
- 1849US8914704B2Mechanism for achieving high memory reliablity, availability and serviceabilityDAS DEBALEENA·Filed 2012·Granted Dec 16, 2014·0 cites·14 claims
- 1948US10552643B2Fast boot up memory controllerINTEL CORP·Filed 2016·Granted Feb 4, 2020·0 cites·24 claims
- 2041US9256493B2Memory module architectureNACHIMUTHU MURUGASAMY K·Filed 2011·Granted Feb 9, 2016·0 cites·23 claims
- 2139US7930602B2Method and system for performing a double pass NTH fail bitmap of a device memoryGLOBALFOUNDRIES INC·Filed 2009·Granted Apr 19, 2011·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →