Inventor · disambiguated record
Didem Z. Turker Melek
Also filed as: TURKER MELEK DIDEM Z
11 granted patents·64 citations·filing 2012–2020
89Inventor score
Files withXILINX INC11
Top patents by PatentIndex Score
11 records- 0197US10868663B1Flexible wide-range and high bandwidth auxiliary clock and data recovery (CDR) circuit for transceiversXILINX INC·Filed 2020·Granted Dec 15, 2020·18 cites·20 claims
- 0289US9755600B1Linear gain code interleaved automatic gain control circuitXILINX INC·Filed 2016·Granted Sep 5, 2017·8 cites·20 claims
- 0388US10749532B1Method and apparatus for a phase locked loop circuitXILINX INC·Filed 2019·Granted Aug 18, 2020·6 cites·20 claims
- 0487US10630301B1Temperature-dependent phase-locked loop (PLL) reset for clock synthesizersXILINX INC·Filed 2018·Granted Apr 21, 2020·6 cites·20 claims
- 0585US10715153B1Multi-port inductors and transformers for accurately predicting voltage-controlled oscillator (VCO) frequencyXILINX INC·Filed 2019·Granted Jul 14, 2020·3 cites·20 claims
- 0685US10270450B1Unified low power bidirectional portXILINX INC·Filed 2018·Granted Apr 23, 2019·5 cites·20 claims
- 0785US8928334B1On-chip noise measurementXILINX INC·Filed 2012·Granted Jan 6, 2015·6 cites·20 claims
- 0883US9237041B1Data reception with feedback equalization for high and low data ratesXILINX INC·Filed 2015·Granted Jan 12, 2016·6 cites·20 claims
- 0974US10498318B1Electrical circuits and methods to correct duty cycle errorXILINX INC·Filed 2018·Granted Dec 3, 2019·2 cites·20 claims
- 1069US10348310B1Programmable digital sigma delta modulatorXILINX INC·Filed 2018·Granted Jul 9, 2019·2 cites·20 claims
- 1164US10623008B2Reconfigurable fractional-N frequency generation for a phase-locked loopXILINX INC·Filed 2015·Granted Apr 14, 2020·2 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →