Inventor · disambiguated record
Duane G. Breid
Also filed as: BREID DUANE · BREID DUANE G
7 granted patents·1 pending application·474 citations·filing 1995–2013
89Inventor score
Top patents by PatentIndex Score
8 records- 0197US6617621B1Gate array architecture using elevated metal levels for customizationVIRAGE LOGIC CORP·Filed 2000·Granted Sep 9, 2003·229 cites·53 claims
- 0288US7129562B1Dual-height cell with variable width power rail architectureVIRAGE LOGIC CORP·Filed 2004·Granted Oct 31, 2006·43 cites·6 claims
- 0388US6838713B1Dual-height cell with variable width power rail architectureVIRAGE LOGIC CORP·Filed 1999·Granted Jan 4, 2005·68 cites·22 claims
- 0476US8392862B1Structures and methods for optimizing power consumption in an integrated chip designSIGUENZA OSCAR·Filed 2007·Granted Mar 5, 2013·13 cites·16 claims
- 0570US5619420ASemiconductor cell having a variable transistor widthLSI LOGIC CORP·Filed 1995·Granted Apr 8, 1997·64 cites·16 claims
- 0659US6385761B1Flexible width cell layout architectureLSI LOGIC CORP·Filed 1999·Granted May 7, 2002·37 cites·8 claims
- 0747US2013200945A1Structures and methods for optimizing power consumption in an integrated chip designSYNOPSYS INC·Filed 2013·Application pending·0 cites
- 0845US5860092AApparatus and method for addressing a cache memory in a computer system utilizing cache tag memory with integrated adder and pre-decode circuitLSI LOGIC CORP·Filed 1997·Granted Jan 12, 1999·20 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →