Inventor · disambiguated record
Edward Hsia
Also filed as: HSIA EDWARD · HSIA EDWARD S
18 granted patents·809 citations·filing 1981–2003
96Inventor score
Top patents by PatentIndex Score
18 records- 0196US6436768B1Source drain implant during ONO formation for improved isolation of SONOS devicesADVANCED MICRO DEVICES INC·Filed 2001·Granted Aug 20, 2002·152 cites·22 claims
- 0296US4573865AMultiple-impingement cooled structureGEN ELECTRIC·Filed 1984·Granted Mar 4, 1986·182 cites·4 claims
- 0395US4526226AMultiple-impingement cooled structureGEN ELECTRIC·Filed 1981·Granted Jul 2, 1985·97 cites·8 claims
- 0494US4798515AVariable nozzle area turbine vane coolingUS AIR FORCE·Filed 1986·Granted Jan 17, 1989·97 cites·17 claims
- 0587US6791880B1Non-volatile memory read circuit with end of life simulationFASL LLC·Filed 2003·Granted Sep 14, 2004·44 cites·19 claims
- 0685US6967873B2Memory device and method using positive gate stress to recover overerased cellADVANCED MICRO DEVICES INC·Filed 2003·Granted Nov 22, 2005·41 cites·20 claims
- 0781US6778442B1Method of dual cell memory device operation for improved end-of-life read marginADVANCED MICRO DEVICES INC·Filed 2003·Granted Aug 17, 2004·31 cites·28 claims
- 0880US6775187B1Method of programming a dual cell memory deviceADVANCED MICRO DEVICES INC·Filed 2003·Granted Aug 10, 2004·29 cites·19 claims
- 0979US6822909B1Method of controlling program threshold voltage distribution of a dual cell memory deviceADVANCED MICRO DEVICES INC·Filed 2003·Granted Nov 23, 2004·27 cites·36 claims
- 1075US6768673B1Method of programming and reading a dual cell memory deviceADVANCED MICRO DEVICES INC·Filed 2003·Granted Jul 27, 2004·23 cites·26 claims
- 1158US6901010B1Erase method for a dual bit memory cellADVANCED MICRO DEVICES INC·Filed 2002·Granted May 31, 2005·12 cites·5 claims
- 1257US6771545B1Method for reading a non-volatile memory cell adjacent to an inactive region of a non-volatile memory cell arrayADVANCED MICRO DEVICES INC·Filed 2003·Granted Aug 3, 2004·10 cites·18 claims
- 1356US5724365AMethod of utilizing redundancy testing to substitute for main array programming and AC speed readsADVANCED MICRO DEVICES INC·Filed 1996·Granted Mar 3, 1998·17 cites·16 claims
- 1454US6813752B1Method of determining charge loss activation energy of a memory arrayADVANCED MICRO DEVICES INC·Filed 2002·Granted Nov 2, 2004·8 cites·26 claims
- 1551US6956768B2Method of programming dual cell memory device to store multiple data states per cellADVANCED MICRO DEVICES INC·Filed 2003·Granted Oct 18, 2005·7 cites·20 claims
- 1644US6381550B1Method of utilizing fast chip erase to screen endurance rejectsADVANCED MICRO DEVICES INC·Filed 1999·Granted Apr 30, 2002·11 cites·9 claims
- 1742US5870407AMethod of screening memory cells at room temperature that would be rejected during hot temperature programming testsADVANCED MICRO DEVICES INC·Filed 1996·Granted Feb 9, 1999·11 cites·16 claims
- 1840US5751633AMethod of screening hot temperature erase rejects at room temperatureADVANCED MICRO DEVICES INC·Filed 1996·Granted May 12, 1998·10 cites·11 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →