Inventor · disambiguated record
Eduardo Maayan
Also filed as: MAAYAN EDUARDO
49 granted patents·9 pending applications·1,794 citations·filing 2000–2024
99Inventor score
Files withSAIFUN SEMICONDUCTORS LTD39MAAYAN EDUARDO4SAIFUN SEMICONDUCTOR LTD2Spansion Israel Ltd2BLOOM ILAN1
Top patents by PatentIndex Score
58 records- 0198US6292394B1Method for programming of a semiconductor memory cellSAIFUN SEMICONDUCTORS LTD·Filed 2000·Granted Sep 18, 2001·199 cites·31 claims
- 0297US6490204B2Programming and erasing methods for a reference cell of an NROM arraySAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Dec 3, 2002·147 cites·16 claims
- 0397US6396741B1Programming of nonvolatile memory cellsSAIFUN SEMICONDUCTORS LTD·Filed 2000·Granted May 28, 2002·177 cites·43 claims
- 0496US7532529B2Apparatus and methods for multi-level sensing in a memory arraySAIFUN SEMICONDUCTORS LTD·Filed 2006·Granted May 12, 2009·49 cites·20 claims
- 0595US7184313B2Method circuit and system for compensating for temperature induced margin loss in non-volatile memory cellsSAIFUN SEMICONDUCTORS LTD·Filed 2005·Granted Feb 27, 2007·45 cites·34 claims
- 0694US6917544B2Multiple use memory chipSAIFUN SEMICONDUCTORS LTD·Filed 2002·Granted Jul 12, 2005·53 cites·34 claims
- 0794US6677805B2Charge pump stage with body effect minimizationSAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Jan 13, 2004·95 cites·24 claims
- 0894US6633496B2Symmetric architecture for memory cells having widely spread metal bit linesSAIFUN SEMICONDUCTORS LTD·Filed 2000·Granted Oct 14, 2003·71 cites·19 claims
- 0994US6535434B2Architecture and scheme for a non-strobed read sequenceSAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Mar 18, 2003·97 cites·46 claims
- 1094US6448750B1Voltage regulator for non-volatile memory with large power supply rejection ration and minimal current drainSAIFUN SEMICONDUCTOR LTD·Filed 2001·Granted Sep 10, 2002·71 cites·13 claims
- 1193US6584017B2Method for programming a reference cellSAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Jun 24, 2003·82 cites·24 claims
- 1292US6975536B2Mass storage array and methods for operation thereofINFINEON TECHNOLOGIES FLASH·Filed 2002·Granted Dec 13, 2005·109 cites·27 claims
- 1392US6636440B2Method for operation of an EEPROM array, including refresh thereofSAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Oct 21, 2003·83 cites·36 claims
- 1491US6791396B2Stack element circuitSAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Sep 14, 2004·43 cites·18 claims
- 1591US6577514B2Charge pump with constant boosted output voltageSAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Jun 10, 2003·75 cites·25 claims
- 1690US6885585B2NROM NOR arraySAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Apr 26, 2005·52 cites·14 claims
- 1789US9991001B2Methods, circuits, devices and systems for sensing an NVM cellSPANSION LLC·Filed 2014·Granted Jun 5, 2018·10 cites·19 claims
- 1889US7489562B2Multiple use memory chipSAIFUN SEMICONDUCTORS LTD·Filed 2007·Granted Feb 10, 2009·13 cites·22 claims
- 1989US6614692B2EEPROM array and method for operation thereofSAIFUN SEMICONDUCTORS LTD·Filed 2001·Granted Sep 2, 2003·46 cites·23 claims
- 2088US7535765B2Non-volatile memory device and method for reading cellsSAIFUN SEMICONDUCTORS LTD·Filed 2007·Granted May 19, 2009·19 cites·16 claims
- 2188US7257025B2Method for reading non-volatile memory cellsSAIFUN SEMICONDUCTORS LTD·Filed 2004·Granted Aug 14, 2007·42 cites·26 claims
- 2285US6633499B1Method for reducing voltage drops in symmetric array architecturesSAIFUN SEMICONDUCTORS LTD·Filed 2000·Granted Oct 14, 2003·36 cites·4 claims
- 2384US7190620B2Method for operating a memory deviceSAIFUN SEMICONDUCTORS LTD·Filed 2005·Granted Mar 13, 2007·16 cites·10 claims
- 2481US7738304B2Multiple use memory chipSAIFUN SEMICONDUCTORS LTD·Filed 2005·Granted Jun 15, 2010·8 cites·20 claims
- 2577US7573745B2Multiple use memory chipSAIFUN SEMICONDUCTORS LTD·Filed 2007·Granted Aug 11, 2009·6 cites·19 claims
- 2677US6781897B2Defects detectionSAIFUN SEMICONDUCTORS LTD·Filed 2002·Granted Aug 24, 2004·24 cites·11 claims
- 2776US7064983B2Method for programming a reference cellSAIFUN SEMICONDUCTORS LTD·Filed 2003·Granted Jun 20, 2006·19 cites·17 claims
- 2870US7466594B2Dynamic matching of signal path and reference path for sensingSAIFUN SEMICONDUCTORS LTD·Filed 2006·Granted Dec 16, 2008·6 cites·12 claims
- 2969US7062619B2Mass storage device architecture and operationSAIFUN SEMICONDUCTOR LTD·Filed 2002·Granted Jun 13, 2006·17 cites·28 claims
- 3068US7457183B2Operating array cells with matched reference cellsSAIFUN SEMICONDUCTORS LTD·Filed 2006·Granted Nov 25, 2008·4 cites·26 claims
- 3167US6864739B2Charge pump stage with body effect minimizationSAIFUN SEMICONDUCTORS LTD·Filed 2003·Granted Mar 8, 2005·17 cites·3 claims
- 3262US8400841B2Device to program adjacent storage cells of different NROM cellsMAAYAN EDUARDO·Filed 2005·Granted Mar 19, 2013·5 cites·12 claims
- 3361US6430077B1Method for regulating read voltage level at the drain of a cell in a symmetric arraySAIFUN SEMICONDUCTORS LTD·Filed 2000·Granted Aug 6, 2002·9 cites·2 claims
- 3460US7599227B2Reduced power programming of non-volatile cellsSAIFUN SEMICONDUCTORS LTD·Filed 2008·Granted Oct 6, 2009·3 cites·22 claims
- 3559US8264884B2Methods, circuits and systems for reading non-volatile memory cellsBLOOM ILAN·Filed 2007·Granted Sep 11, 2012·4 cites·10 claims
- 3659US7095655B2Dynamic matching of signal path and reference path for sensingSAIFUN SEMICONDUCTORS LTD·Filed 2004·Granted Aug 22, 2006·9 cites·7 claims
- 3757US7366025B2Reduced power programming of non-volatile cellsSAIFUN SEMICONDUCTORS LTD·Filed 2004·Granted Apr 29, 2008·7 cites·10 claims
- 3856US6954382B2Multiple use memory chipSAIFUN SEMICONDUCTORS LTD·Filed 2004·Granted Oct 11, 2005·5 cites·37 claims
- 3955US2025315170A1System and Method for Generation of Unique Digital Signature Using a Non-Volatile Memory based Physical Unclonable FunctionInfineon Technologies LLC·Filed 2024·Application pending·0 cites
- 4054US7400529B2Non-volatile memory cell and non-volatile memory device using said cellSAIFUN SEMICONDUCTORS LTD·Filed 2007·Granted Jul 15, 2008·0 cites·21 claims
- 4153US7256438B2MOS capacitor with reduced parasitic capacitanceSAIFUN SEMICONDUCTORS LTD·Filed 2004·Granted Aug 14, 2007·5 cites·3 claims
- 4252US7864612B2Reading array cell with matched reference cellSpansion Israel Ltd·Filed 2008·Granted Jan 4, 2011·1 cites·15 claims
- 4348US10304545B2Methods, circuits, devices, and systems for sensing an NVM cellCYPRESS SEMICONDUCTOR CORP·Filed 2018·Granted May 28, 2019·0 cites·20 claims
- 4448US2008111177A1Non-volatile memory cell and non-volatile memory device using said cellMAAYAN EDUARDO·Filed 2007·Application pending·0 cites
- 4548US2009032862A1Non-volatile memory cell and non-volatile memory device using said cellMAAYAN EDUARDO·Filed 2007·Application pending·0 cites
- 4647US7755938B2Method for reading a memory array with neighbor effect cancellationSAIFUN SEMICONDUCTORS LTD·Filed 2004·Granted Jul 13, 2010·6 cites·9 claims
- 4747US7518908B2EEPROM array and method for operation thereofSAIFUN SEMICONDUCTORS LTD·Filed 2002·Granted Apr 14, 2009·4 cites·22 claims
- 4846US8971129B2NROM device with reduced power unitSpansion Israel Ltd·Filed 2013·Granted Mar 3, 2015·0 cites·11 claims
- 4945US7701779B2Method for programming a reference cellSAJFUN SEMICONDUCTORS LTD·Filed 2006·Granted Apr 20, 2010·2 cites·21 claims
- 5040US7512009B2Method for programming a reference cellSAIFUN SEMICONDUCTORS LTD·Filed 2006·Granted Mar 31, 2009·0 cites·2 claims
Showing the top 50 of 58 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →