Inventor · disambiguated record
Eino Jacobs
Also filed as: JACOBS EINO
16 granted patents·580 citations·filing 1994–2014
95Inventor score
Files withPHILIPS ELECTRONICS NA8PHILIPS CORP2SYNOPSYS INC2JACOBS EINO1KONINKL PHILIPS ELECTRONICS NV1
Top patents by PatentIndex Score
16 records- 0178US8583895B2Compressed instruction format for use in a VLIW processorJACOBS EINO·Filed 2004·Granted Nov 12, 2013·30 cites·3 claims
- 0278US6047358AComputer system, cache memory and process for cache entry replacement with selective locking of elements in different ways and groupsPHILIPS ELECTRONICS NA·Filed 1997·Granted Apr 4, 2000·87 cites·31 claims
- 0374US5878267ACompressed instruction format for use in a VLIW processor and processor for processing such instructionsPHILIPS ELECTRONICS NA·Filed 1998·Granted Mar 2, 1999·59 cites·4 claims
- 0474US5826054ACompressed Instruction format for use in a VLIW processorPHILIPS ELECTRONICS NA·Filed 1996·Granted Oct 20, 1998·58 cites·20 claims
- 0571US5787302ASoftware for producing instructions in a compressed format for a VLIW processorPHILIPS ELECTRONIC NORTH AMERI·Filed 1996·Granted Jul 28, 1998·56 cites·24 claims
- 0670US9569220B2Processor branch cache with secondary branchesSYNOPSYS INC·Filed 2014·Granted Feb 14, 2017·2 cites·18 claims
- 0769US6385678B2Method and apparatus for bus arbitration with weighted bandwidth allocationTRIMEDIA TECHNOLOGIES INC·Filed 1996·Granted May 7, 2002·58 cites·39 claims
- 0865US5909563AComputer system including an interface for transferring data between two clock domainsPHILIPS ELECTRONICS NA·Filed 1997·Granted Jun 1, 1999·58 cites·11 claims
- 0962US6134633APrefetch management in cache memoryPHILIPS CORP·Filed 1997·Granted Oct 17, 2000·42 cites·12 claims
- 1062US6131152APlanar cache layout and instruction stream thereforPHILIPS ELECTRONICS NA·Filed 1996·Granted Oct 10, 2000·39 cites·21 claims
- 1161US5444288ACMOS integrated circuit having improved power-supply filteringPHILIPS CORP·Filed 1994·Granted Aug 22, 1995·21 cites·5 claims
- 1254US5852741AVLIW processor which processes compressed instruction formatPHILIPS ELECTRONICS NA·Filed 1996·Granted Dec 22, 1998·28 cites·27 claims
- 1352US9465616B2Instruction cache with way predictionSYNOPSYS INC·Filed 2014·Granted Oct 11, 2016·0 cites·19 claims
- 1446US5862398ACompiler generating swizzled instructions usable in a simplified cache layoutPHILIPS ELECTRONICS NA·Filed 1996·Granted Jan 19, 1999·18 cites·7 claims
- 1544US6704859B1Compressed instruction format for use in a VLIW processorKONINKL PHILIPS ELECTRONICS NV·Filed 1998·Granted Mar 9, 2004·13 cites·8 claims
- 1639US5931939ARead crossbar elimination in a VLIW processorPHILIPS ELECTRONICS NA·Filed 1997·Granted Aug 3, 1999·11 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →