Inventor · disambiguated record
Emmanuel Augendre
Also filed as: AUGENDRE EMMANUEL
31 granted patents·4 pending applications·264 citations·filing 2002–2024
95Inventor score
Files withCOMMISSARIAT ENERGIE ATOMIQUE30ANDRIEU FRANÇOIS1AUGENDRE EMMANUEL1COMMISSARIAT L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES1IBM1
Top patents by PatentIndex Score
35 records- 0196US8853785B2Integrated circuit with electrostatically coupled MOS transistors and method for producing such an integrated circuitAUGENDRE EMMANUEL·Filed 2010·Granted Oct 7, 2014·182 cites·10 claims
- 0290US10217849B2Method for making a semiconductor device with nanowire and aligned external and internal spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Feb 26, 2019·7 cites·14 claims
- 0388US11469137B2Manufacturing process of an RF-SOI trapping layer substrate resulting from a crystalline transformation of a buried layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Oct 11, 2022·2 cites·20 claims
- 0488US10269930B2Method for producing a semiconductor device with self-aligned internal spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Apr 23, 2019·6 cites·15 claims
- 0588US10134875B2Method for fabricating a transistor having a vertical channel having nano layersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Nov 20, 2018·5 cites·15 claims
- 0686US6855605B2Semiconductor device with selectable gate thickness and method of manufacturing such devicesIMEC INTER UNI MICRO ELECTR·Filed 2002·Granted Feb 15, 2005·38 cites·22 claims
- 0784US9853124B2Method for fabricating a nanowire semiconductor transistor having an auto-aligned gate and spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Dec 26, 2017·4 cites·14 claims
- 0883US10714392B2Optimizing junctions of gate all around structures with channel pull backIBM·Filed 2018·Granted Jul 14, 2020·3 cites·15 claims
- 0982US10217842B2Method for making a semiconductor device with self-aligned inner spacersCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Feb 26, 2019·3 cites·13 claims
- 1080US10431683B2Method for making a semiconductor device with a compressive stressed channelCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Oct 1, 2019·3 cites·18 claims
- 1176US10600786B2Method for fabricating a device with a tensile-strained NMOS transistor and a uniaxial compression strained PMOS transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Mar 24, 2020·2 cites·8 claims
- 1276US10141424B2Method of producing a channel structure formed from a plurality of strained semiconductor barsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Nov 27, 2018·2 cites·10 claims
- 1376US10109735B2Process for fabricating a field effect transistor having a coating gateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Oct 23, 2018·2 cites·12 claims
- 1476US9704709B2Method for causing tensile strain in a semiconductor filmCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Jul 11, 2017·2 cites·14 claims
- 1571US10818775B2Method for fabricating a field-effect transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2018·Granted Oct 27, 2020·1 cites·13 claims
- 1667US11450755B2Electronic device including at least one nano-objectCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Sep 20, 2022·0 cites·20 claims
- 1765US9536951B2FinFET transistor comprising portions of SiGe with a crystal orientation [111]COMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Jan 3, 2017·1 cites·14 claims
- 1860US11688811B2Transistor comprising a channel placed under shear strain and fabrication processCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Jun 27, 2023·0 cites·6 claims
- 1960US2025022711A1Method for producing a stress state in a semiconductive layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2024·Application pending·0 cites
- 2053US11848191B2RF substrate structure and method of productionCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2021·Granted Dec 19, 2023·0 cites·17 claims
- 2152US10727320B2Method of manufacturing at least one field effect transistor having epitaxially grown electrodesCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Jul 28, 2020·0 cites·18 claims
- 2251US10978594B2Transistor comprising a channel placed under shear strain and fabrication processCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Apr 13, 2021·0 cites·13 claims
- 2350US12119258B2Semiconductor structure comprising a buried porous layer for RF applicationsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2020·Granted Oct 15, 2024·0 cites·20 claims
- 2450US2022148908A1Method for forming a useful substrate trapping structureCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2021·Application pending·0 cites
- 2550US2015180038A1Bipolar Li-Ion Battery with Improved Seal and Associated Production ProcessCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2013·Application pending·0 cites
- 2648US8809964B2Method of adjusting the threshold voltage of a transistor by a buried trapping layerANDRIEU FRANÇOIS·Filed 2009·Granted Aug 19, 2014·1 cites·20 claims
- 2747US7879690B2Method of fabricating a microelectronic structure of a semiconductor on insulator type with different patternsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2009·Granted Feb 1, 2011·0 cites·10 claims
- 2844US10256102B2Method for fabricating a field effect transistor having a surrounding gridCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2018·Granted Apr 9, 2019·0 cites·13 claims
- 2944US9997394B2Method for transferring a thin layer with supply of heat energy to a fragile zone via an inductive layerCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2014·Granted Jun 12, 2018·0 cites·14 claims
- 3041US10096694B2Process for fabricating a vertical-channel nanolayer transistorCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Oct 9, 2018·0 cites·18 claims
- 3139US10147788B2Process for fabricating a field effect transistor having a coating gateCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted Dec 4, 2018·0 cites·14 claims
- 3238US10665497B2Method of manufacturing a structure having one or several strained semiconducting zones that may for transistor channel regionsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2017·Granted May 26, 2020·0 cites·8 claims
- 3337US9853130B2Method of modifying the strain state of a semiconducting structure with stacked transistor channelsCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2016·Granted Dec 26, 2017·0 cites·10 claims
- 3436US9917153B2Method for producing a microelectronic deviceCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2015·Granted Mar 13, 2018·0 cites·34 claims
- 3536US2017288040A1Method of forming sige channel formation regionCOMMISSARIAT L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES·Filed 2016·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →