Inventor · disambiguated record
Eric Guiot
Also filed as: GUIOT ERIC
10 granted patents·14 pending applications·22 citations·filing 2004–2023
82Inventor score
Files withSOITEC SILICON ON INSULATOR17CHHAIMI NABIL2COMMISSARIAT ENERGIE ATOMIQUE1LANDRU DIDIER1S O TEC SILICON ON INSULATOR T1
Top patents by PatentIndex Score
24 records- 0187US9954139B2Multiple transfer assembly processSOITEC SILICON ON INSULATOR·Filed 2014·Granted Apr 24, 2018·7 cites·13 claims
- 0272US9136113B2Process to dissolve the oxide layer in the peripheral ring of a structure of semiconductor-on-insulator typeSOITEC SILICON ON INSULATOR·Filed 2013·Granted Sep 15, 2015·3 cites·18 claims
- 0369US8324072B2Process for locally dissolving the oxide layer in a semiconductor-on-insulator type structureVEYTIZOU CHRISTELLE·Filed 2009·Granted Dec 4, 2012·5 cites·14 claims
- 0461US7217639B2Method of manufacturing a material compound waferSOITEC SILICON ON INSULATOR·Filed 2004·Granted May 15, 2007·7 cites·21 claims
- 0555US10361326B2Advanced CPV solar cell assembly processSOITEC SILICON ON INSULATOR·Filed 2014·Granted Jul 23, 2019·0 cites·26 claims
- 0654US2009325362A1Method of recycling an epitaxied donor waferCHHAIMI NABIL·Filed 2009·Application pending·0 cites
- 0753US2024271321A1Method for manufacturing a composite structure comprising a thin film of monocrystalline sic on a carrier substrate of polycrystalline sicSOITEC SILICON ON INSULATOR·Filed 2022·Application pending·0 cites
- 0852US12270123B2Method for producing a substrate for the epitaxial growth of a layer of a galium-based III-N alloySOITEC SILICON ON INSULATOR·Filed 2021·Granted Apr 8, 2025·0 cites·18 claims
- 0950US2025063784A1Process for the manufacture of a semiconductor structure comprising a polycrystalline silicon carbide substrate and an active layer of single-crystal silicon carbideSOITEC SILICON ON INSULATOR·Filed 2022·Application pending·0 cites
- 1050US2011275226A1Process to dissolve the oxide layer in the peripheral ring of a structure of semiconductor-on-insulator typeLANDRU DIDIER·Filed 2009·Application pending·0 cites
- 1149US2025233031A1Substrate for electronic deviceSOITEC SILICON ON INSULATOR·Filed 2023·Application pending·0 cites
- 1248US12198983B2Method for producing a composite structure comprising a thin layer of monocrystalline sic on a carrier substrate of polycrystalline SiCSOITEC SILICON ON INSULATOR·Filed 2020·Granted Jan 14, 2025·0 cites·20 claims
- 1348US2023411140A1Method for producing a substrate for epitaxial growth of a gallium-based iii-n alloy layerSOITEC SILICON ON INSULATOR·Filed 2021·Application pending·0 cites
- 1448US2011183493A1Process for manufacturing a structure comprising a germanium layer on a substrateSOITEC SILICON ON INSULATOR·Filed 2009·Application pending·0 cites
- 1548US2007105246A1Method of manufacturing a material compound waferSOITEC SILICON ON INSULATOR·Filed 2006·Application pending·0 cites
- 1648US2023411151A1Method for producing a substrate for the epitaxial growth of a layer of a gallium-based iii-n alloySOITEC SILICON ON INSULATOR·Filed 2021·Application pending·0 cites
- 1748US2024266172A1Semiconductor structure comprising an electrically conductive bonding interface, and associated manufacturing methodCOMMISSARIAT ENERGIE ATOMIQUE·Filed 2021·Application pending·0 cites
- 1845US2011193201A1Method to fabricate and treat a structure of semiconductor-on-insulator type, enabling displacement of dislocations, and corresponding structureSOITEC SILICON ON INSULATOR·Filed 2009·Application pending·0 cites
- 1944US2010167500A1Method of recycling an epitaxied donor waferS O TEC SILICON ON INSULATOR T·Filed 2010·Application pending·0 cites
- 2043US8343850B2Process for fabricating a substrate comprising a deposited buried oxide layerSOITEC SILICON ON INSULATOR·Filed 2008·Granted Jan 1, 2013·0 cites·16 claims
- 2142US11251321B2Engineered substrate with embedded mirrorSOITEC SILICON ON INSULATOR·Filed 2017·Granted Feb 15, 2022·0 cites·20 claims
- 2239US2007087526A1Method of recycling an epitaxied donor waferCHHAIMI NABIL·Filed 2006·Application pending·0 cites
- 2338US7256103B2Method for manufacturing a compound material waferSOITEC SILICON ON INSULATOR·Filed 2004·Granted Aug 14, 2007·0 cites·17 claims
- 2433US2005130393A1Method for improving the quality of heterostructureFiled 2004·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Eric Guiot files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →