Inventor · disambiguated record
Errol Todd Ryan
Also filed as: RYAN ERROL T · RYAN ERROL TODD
62 granted patents·14 pending applications·442 citations·filing 2000–2022
98Inventor score
Files withGLOBALFOUNDRIES INC49ADVANCED MICRO DEVICES INC11INTEL CORP4INTERMOLECULAR INC4RYAN ERROL T2
Top patents by PatentIndex Score
76 records- 0198US10177028B1Method for manufacturing fully aligned via structures having relaxed gapfillsGLOBALFOUNDRIES INC·Filed 2017·Granted Jan 8, 2019·44 cites·20 claims
- 0297US8357609B2Dual damascene-like subtractive metal etch schemeGLOBALFOUNDRIES INC·Filed 2010·Granted Jan 22, 2013·47 cites·20 claims
- 0396US9530691B1Methods, apparatus and system for forming a dielectric field for dual orientation self aligned viasGLOBALFOUNDRIES INC·Filed 2016·Granted Dec 27, 2016·15 cites·20 claims
- 0496US9012322B2Selective etching of copper and copper-barrier materials by an aqueous base solution with fluoride additionINTERMOLECULAR INC·Filed 2013·Granted Apr 21, 2015·30 cites·17 claims
- 0594US9831174B1Devices and methods of forming low resistivity noble metal interconnectGLOBALFOUNDRIES INC·Filed 2016·Granted Nov 28, 2017·9 cites·13 claims
- 0694US9520321B2Integrated circuits and methods for fabricating integrated circuits with self-aligned viasGLOBALFOUNDRIES INC·Filed 2015·Granted Dec 13, 2016·11 cites·16 claims
- 0793US9123785B1Method to etch Cu/Ta/TaN selectively using dilute aqueous HF/HCI solutionINTERMOLECULAR INC·Filed 2014·Granted Sep 1, 2015·12 cites·20 claims
- 0892US9431294B2Methods of producing integrated circuits with an air gapGLOBALFOUNDRIES INC·Filed 2014·Granted Aug 30, 2016·14 cites·19 claims
- 0990US10134580B1Metallization levels and methods of making thereofGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 20, 2018·6 cites·17 claims
- 1090US10109526B1Etch profile control during skip via formationGLOBALFOUNDRIES INC·Filed 2017·Granted Oct 23, 2018·9 cites·18 claims
- 1190US8815685B2Methods for fabricating integrated circuits having confined epitaxial growth regionsGLOBALFOUNDRIES INC·Filed 2013·Granted Aug 26, 2014·10 cites·18 claims
- 1290US8691696B2Methods for forming an integrated circuit with straightened recess profileCAI XIUYU·Filed 2012·Granted Apr 8, 2014·11 cites·18 claims
- 1389US10181421B1Liner recess for fully aligned viaGLOBALFOUNDRIES INC·Filed 2017·Granted Jan 15, 2019·6 cites·15 claims
- 1489US8835306B2Methods for fabricating integrated circuits having embedded electrical interconnectsGLOBALFOUNDRIES INC·Filed 2013·Granted Sep 16, 2014·11 cites·20 claims
- 1589US8753975B1Methods of forming conductive copper-based structures using a copper-based nitride seed layer without a barrier layer and the resulting deviceGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 17, 2014·10 cites·21 claims
- 1684US6555479B1Method for forming openings for conductive interconnectsADVANCED MICRO DEVICES INC·Filed 2001·Granted Apr 29, 2003·31 cites·48 claims
- 1783US10163633B2Non-mandrel cut formationGLOBALFOUNDRIES INC·Filed 2017·Granted Dec 25, 2018·3 cites·19 claims
- 1882US10580696B1Interconnects formed by a metal displacement reactionGLOBALFOUNDRIES INC·Filed 2018·Granted Mar 3, 2020·3 cites·20 claims
- 1982US8932934B2Methods of self-forming barrier integration with pore stuffed ULK materialGLOBALFOUNDRIES INC·Filed 2013·Granted Jan 13, 2015·6 cites·13 claims
- 2077US9559059B2Methods of forming an improved via to contact interface by selective formation of a conductive capping layerGLOBALFOUNDRIES INC·Filed 2014·Granted Jan 31, 2017·4 cites·17 claims
- 2177US8349731B2Methods for forming copper diffusion barriers for semiconductor interconnect structuresGLOBALFOUNDRIES INC·Filed 2011·Granted Jan 8, 2013·4 cites·20 claims
- 2277US6869879B1Method for forming conductive interconnectsADVANCEDMICRO DEVICES INC·Filed 2000·Granted Mar 22, 2005·24 cites·123 claims
- 2376US9054052B2Methods for integration of pore stuffing materialGLOBALFOUNDRIES INC·Filed 2013·Granted Jun 9, 2015·3 cites·17 claims
- 2476US6489240B1Method for forming copper interconnectsADVANCED MICRO DEVICES INC·Filed 2001·Granted Dec 3, 2002·23 cites·14 claims
- 2575US6809032B1Method and apparatus for detecting the endpoint of a chemical-mechanical polishing operation using optical techniquesADVANCED MICRO DEVICES INC·Filed 2002·Granted Oct 26, 2004·18 cites·15 claims
- 2674US10485111B2Via and skip via structuresGLOBALFOUNDRIES INC·Filed 2017·Granted Nov 19, 2019·2 cites·16 claims
- 2772US8431482B1Integrated circuits and methods for processing integrated circuits with embedded featuresRYAN ERROL T·Filed 2012·Granted Apr 30, 2013·3 cites·18 claims
- 2871US9343408B2Method to etch Cu/Ta/TaN selectively using dilute aqueous HF/H2SO4 solutionINTERMOLECULAR INC·Filed 2013·Granted May 17, 2016·2 cites·15 claims
- 2971US9209075B2Integration of optical components in integrated circuitsGLOBALFOUNDRIES INC·Filed 2013·Granted Dec 8, 2015·2 cites·7 claims
- 3071US9076846B2Methods for fabricating integrated circuits using surface modification to selectively inhibit etchingGLOBALFOUNDRIES INC·Filed 2013·Granted Jul 7, 2015·2 cites·20 claims
- 3171US8704372B2Integrated circuits and methods for processing integrated circuits with embedded featuresGLOBALFOUNDRIES INC·Filed 2013·Granted Apr 22, 2014·2 cites·12 claims
- 3271US7843015B2Multi-silicide system in integrated circuit technologyGLOBALFOUNDRIES INC·Filed 2005·Granted Nov 30, 2010·4 cites·6 claims
- 3370US8871635B2Integrated circuits and processes for forming integrated circuits having an embedded electrical interconnect within a substratePARK CHANRO·Filed 2012·Granted Oct 28, 2014·3 cites·17 claims
- 3469US10199261B1Via and skip via structuresGLOBALFOUNDRIES INC·Filed 2017·Granted Feb 5, 2019·1 cites·20 claims
- 3569US6413846B1Contact each methodology and integration schemeADVANCED MICRO DEVICES INC·Filed 2000·Granted Jul 2, 2002·15 cites·36 claims
- 3668US9224639B2Method to etch cu/Ta/TaN selectively using dilute aqueous Hf/hCl solutionINTERMOLECULAR INC·Filed 2015·Granted Dec 29, 2015·1 cites·21 claims
- 3766US9435947B2Integration of optical components in integrated circuits by separating two substrates with an insulation layerGLOBALFOUNDRIES INC·Filed 2015·Granted Sep 6, 2016·1 cites·20 claims
- 3864US9570394B1Formation of IC structure with pair of unitary metal finsGLOBALFOUNDRIES INC·Filed 2016·Granted Feb 14, 2017·1 cites·20 claims
- 3964US8859419B2Methods of forming copper-based nitride liner/passivation layers for conductive copper structures and the resulting deviceGLOBALFOUNDRIES INC·Filed 2013·Granted Oct 14, 2014·1 cites·15 claims
- 4062US9466530B2Methods of forming an improved via to contact interface by selective formation of a metal silicide capping layerGLOBALFOUNDRIES INC·Filed 2014·Granted Oct 11, 2016·1 cites·14 claims
- 4162US6514858B1Test structure for providing depth of polish feedbackADVANCED MICRO DEVICES INC·Filed 2001·Granted Feb 4, 2003·8 cites·16 claims
- 4261US10636698B2Skip via structuresGLOBALFOUNDRIES INC·Filed 2019·Granted Apr 28, 2020·0 cites·11 claims
- 4361US7670915B1Contact liner in integrated circuit technologyADVANCED MICRO DEVICES INC·Filed 2004·Granted Mar 2, 2010·9 cites·20 claims
- 4461US6969678B1Multi-silicide in integrated circuit technologyADVANCED MICRO DEVICES INC·Filed 2003·Granted Nov 29, 2005·8 cites·8 claims
- 4556US9583380B2Anisotropic material damage process for etching low-K dielectric materialsGLOBALFOUNDRIES INC·Filed 2014·Granted Feb 28, 2017·0 cites·18 claims
- 4656US9318436B2Copper based nitride liner passivation layers for conductive copper structuresGLOBALFOUNDRIES INC·Filed 2014·Granted Apr 19, 2016·0 cites·10 claims
- 4755US10679937B2Devices and methods of forming low resistivity noble metal interconnectGLOBALFOUNDRIES INC·Filed 2017·Granted Jun 9, 2020·0 cites·12 claims
- 4854US12113012B2Device, method and system to prevent pattern collapse in a semiconductor structureINTEL CORP·Filed 2020·Granted Oct 8, 2024·0 cites·18 claims
- 4953US2023363297A1Technologies for semiconductor devices including amorphous siliconINTEL CORP·Filed 2022·Application pending·0 cites
- 5052US8367562B2Method for uniform nanoscale film depositionGLOBALFOUNDRIES INC·Filed 2009·Granted Feb 5, 2013·0 cites·11 claims
Showing the top 50 of 76 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →