Inventor · disambiguated record
G. R. Mohan Rao
Also filed as: BHATIA SHYAM · MOHAN G R · RAO G R MOHAN · RAO MOHAN G R
113 granted patents·5 pending applications·3,560 citations·filing 1976–2025
99Inventor score
Files withTEXAS INSTRUMENTS INC30CIRRUS LOGIC INC26RAO G R MOHAN26SILICON AQUARIUS INC10VERVAIN LLC9
Top patents by PatentIndex Score
118 records- 0199US4330852ASemiconductor read/write memory array having serial accessTEXAS INSTRUMENTS INC·Filed 1979·Granted May 18, 1982·257 cites·7 claims
- 0299US4213139ADouble level polysilicon series transistor cellTEXAS INSTRUMENTS INC·Filed 1978·Granted Jul 15, 1980·235 cites·6 claims
- 0398US12119054B2Lifetime mixed level non-volatile memory systemVERVAIN LLC·Filed 2024·Granted Oct 15, 2024·3 cites·20 claims
- 0498US11967370B1Lifetime mixed level non-volatile memory systemVERVAIN LLC·Filed 2023·Granted Apr 23, 2024·7 cites·18 claims
- 0598US8891298B2Lifetime mixed level non-volatile memory systemRAO G R MOHAN·Filed 2012·Granted Nov 18, 2014·29 cites·11 claims
- 0698US8106481B2Semiconductor devices with graded dopant regionsRAO G R MOHAN·Filed 2009·Granted Jan 31, 2012·125 cites·21 claims
- 0797US12136455B2Lifetime mixed level non-volatile memory systemVERVAIN LLC·Filed 2024·Granted Nov 5, 2024·2 cites·14 claims
- 0897US9997240B2Lifetime mixed level non-volatile memory systemGREENTHREAD LLC·Filed 2015·Granted Jun 12, 2018·18 cites·10 claims
- 0997US9196385B2Lifetime mixed level non-volatile memory systemGREENTHREAD LLC·Filed 2014·Granted Nov 24, 2015·22 cites·15 claims
- 1097US6005799AMethods and circuits for single-memory dynamic cell multivalue data storageSILICON AQUARIUS·Filed 1998·Granted Dec 21, 1999·430 cites·16 claims
- 1196US12224005B1Lifetime mixed level non-volatile memory systemVERVAIN LLC·Filed 2024·Granted Feb 11, 2025·1 cites·18 claims
- 1296US10950300B2Lifetime mixed level non-volatile memory systemVERVAIN LLC·Filed 2018·Granted Mar 16, 2021·14 cites·12 claims
- 1396US8531880B2Nonvolatile memory systems with embedded fast read and write memoriesRAO G R MOHAN·Filed 2012·Granted Sep 10, 2013·17 cites·17 claims
- 1496US5636174AFast cycle time-low latency dynamic random access memories and systems and methods using the sameCIRRUS LOGIC INC·Filed 1996·Granted Jun 3, 1997·164 cites·34 claims
- 1596US5473566AMemory architecture and devices, systems and methods utilizing the sameCIRRUS LOGIC INC·Filed 1994·Granted Dec 5, 1995·151 cites·30 claims
- 1695US4347587ASemiconductor integrated circuit memory device with both serial and random access arraysTEXAS INSTRUMENTS INC·Filed 1979·Granted Aug 31, 1982·56 cites·10 claims
- 1794US7855916B2Nonvolatile memory systems with embedded fast read and write memoriesRAO G R MOHAN·Filed 2008·Granted Dec 21, 2010·23 cites·1 claims
- 1891US6504785B1Multiprocessor system with integrated memorySILICON AQUARIUS INC·Filed 2000·Granted Jan 7, 2003·60 cites·21 claims
- 1991US4055444AMethod of making N-channel MOS integrated circuitsTEXAS INSTRUMENTS INC·Filed 1976·Granted Oct 25, 1977·64 cites·9 claims
- 2090US4110776ASemiconductor integrated circuit with implanted resistor element in polycrystalline silicon layerTEXAS INSTRUMENTS INC·Filed 1976·Granted Aug 29, 1978·70 cites·21 claims
- 2189US10734481B2Semiconductor devices with graded dopant regionsGREENTHREAD LLC·Filed 2019·Granted Aug 4, 2020·2 cites·36 claims
- 2289US5473573ASingle chip controller-memory device and a memory architecture and methods suitable for implementing the sameCIRRUS LOGIC INC·Filed 1994·Granted Dec 5, 1995·61 cites·38 claims
- 2389US4281401ASemiconductor read/write memory array having high speed serial shift register accessTEXAS INSTRUMENTS INC·Filed 1979·Granted Jul 28, 1981·35 cites·10 claims
- 2489US4207618AOn-chip refresh for dynamic memoryTEXAS INSTRUMENTS INC·Filed 1978·Granted Jun 10, 1980·33 cites·10 claims
- 2588US7433258B2Posted precharge and multiple open-page RAM architectureDATASECURE LLC·Filed 2004·Granted Oct 7, 2008·57 cites·26 claims
- 2688US6041389AMemory architecture using content addressable memory, and systems and methods using the sameCIRRUS LOGIC INC E·Filed 1995·Granted Mar 21, 2000·88 cites·23 claims
- 2788US5920885ADynamic random access memory with a normal precharge mode and a priority precharge modeCIRRUS LOGIC INC·Filed 1998·Granted Jul 6, 1999·56 cites·7 claims
- 2888US5856940ALow latency DRAM cell and method thereforSILICON AQUARIUS INC·Filed 1997·Granted Jan 5, 1999·70 cites·15 claims
- 2987US9792219B2Nonvolatile memory systems with embedded fast read and write memoriesGREENTHREAD LLC·Filed 2016·Granted Oct 17, 2017·5 cites·13 claims
- 3087US6282603B1Memory with pipelined accessed and priority prechargeCIRRUS LOGIC INC·Filed 1998·Granted Aug 28, 2001·55 cites·10 claims
- 3187US4239993AHigh performance dynamic sense amplifier with active loadsTEXAS INSTRUMENTS INC·Filed 1978·Granted Dec 16, 1980·27 cites·10 claims
- 3287US4070653ARandom access memory cell with ion implanted resistor elementTEXAS INSTRUMENTS INC·Filed 1976·Granted Jan 24, 1978·40 cites·13 claims
- 3386US9257184B2Nonvolatile memory systems with embedded fast read and write memoriesRAO G R MOHAN·Filed 2014·Granted Feb 9, 2016·5 cites·16 claims
- 3485US8862901B2Memory subsystem and method thereforRAO G R MOHAN·Filed 2011·Granted Oct 14, 2014·10 cites·3 claims
- 3585US5657285APipelined address memories, and systems and methods using the sameCIRRUS LOGIC INC·Filed 1996·Granted Aug 12, 1997·46 cites·8 claims
- 3684US9647070B2Semiconductor devices with graded dopant regionsGREENTHREAD LLC·Filed 2015·Granted May 9, 2017·2 cites·4 claims
- 3784US5953738ADRAM with integral SRAM and arithmetic-logic unitsSILICON AQUARIUS INC·Filed 1997·Granted Sep 14, 1999·109 cites·30 claims
- 3884US5835932AMethods and systems for maintaining data locality in a multiple memory bank system having DRAM with integral SRAMSILICON AQUARIUS INC·Filed 1997·Granted Nov 10, 1998·50 cites·26 claims
- 3984US4208781ASemiconductor integrated circuit with implanted resistor element in polycrystalline silicon layerTEXAS INSTRUMENTS INC·Filed 1978·Granted Jun 24, 1980·45 cites·15 claims
- 4083US11967369B2Lifetime mixed level non-volatile memory systemVERVAIN LLC·Filed 2023·Granted Apr 23, 2024·0 cites·10 claims
- 4183US11854612B1Lifetime mixed level non-volatile memory systemVERVAIN LLC·Filed 2023·Granted Dec 26, 2023·0 cites·7 claims
- 4282US2025218508A1Lifetime mixed level non-volatile memory systemVERVAIN LLC·Filed 2025·Application pending·0 cites
- 4380US9190502B2Semiconductor devices with graded dopant regionsRAO G R MOHAN·Filed 2014·Granted Nov 17, 2015·2 cites·12 claims
- 4480US8421195B2Semiconductor devices with graded dopant regionsRAO G R MOHAN·Filed 2007·Granted Apr 16, 2013·4 cites·14 claims
- 4580US8363451B2Random access memory with CMOS-compatible nonvolatile storage element and parallel storage capacitorS AQUA SEMICONDUCTOR LLC·Filed 2012·Granted Jan 29, 2013·5 cites·17 claims
- 4679US7755961B2Memories with selective prechargeRAO G R MOHAN·Filed 2007·Granted Jul 13, 2010·11 cites·47 claims
- 4779US7580273B2Digital memory with controllable input/output terminalsRAO G R MOHAN·Filed 2007·Granted Aug 25, 2009·9 cites·25 claims
- 4879US4543500AHigh performance dynamic sense amplifier voltage boost for row address linesTEXAS INSTRUMENTS INC·Filed 1980·Granted Sep 24, 1985·28 cites·7 claims
- 4978US4380863AMethod of making double level polysilicon series transistor devicesTEXAS INSTRUMENTS INC·Filed 1982·Granted Apr 26, 1983·28 cites·9 claims
- 5078US2023153247A1Memory devices supporting read/modify/write memory operations involving both volatile memory and nonvolatile memoryFLASH CONTROL LLC·Filed 2023·Application pending·0 cites
Showing the top 50 of 118 patent records by PatentIndex Score.
Join the waitlist — get patent alerts
Get an alert when G. R. Mohan Rao files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →