Inventor · disambiguated record
Gabriel Z. Guevara
Also filed as: GUEVARA GABRIEL · GUEVARA GABRIEL Z
24 granted patents·11 pending applications·106 citations·filing 2012–2025
94Inventor score
Files withADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC13INVENSAS CORP13XCELSIS CORP5ADEIA SEMICONDUCTOR TECH LLC1GUEVARA GABRIEL Z1
Top patents by PatentIndex Score
35 records- 0198US11955463B2Direct bonded stack structures for increased reliability and improved yield in microelectronicsADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2022·Granted Apr 9, 2024·6 cites·55 claims
- 0298US11296053B2Direct bonded stack structures for increased reliability and improved yield in microelectronicsINVENSAS BONDING TECH INC·Filed 2020·Granted Apr 5, 2022·41 cites·18 claims
- 0397US12272677B2Direct bonded stack structures for increased reliability and improved yield in microelectronicsADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2024·Granted Apr 8, 2025·3 cites·21 claims
- 0497US11626363B2Bonded structures with integrated passive componentADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2017·Granted Apr 11, 2023·16 cites·25 claims
- 0596US12057383B2Bonded structures with integrated passive componentADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2022·Granted Aug 6, 2024·3 cites·31 claims
- 0692US10332854B2Anchoring structure of fine pitch bvaINVENSAS CORP·Filed 2016·Granted Jun 25, 2019·10 cites·7 claims
- 0786US10750614B2Deformable electrical contacts with conformable target padsINVENSAS CORP·Filed 2018·Granted Aug 18, 2020·5 cites·18 claims
- 0885US10008469B2Wafer-level packaging using wire bond wires in place of a redistribution layerINVENSAS CORP·Filed 2016·Granted Jun 26, 2018·4 cites·13 claims
- 0983US10483217B2Warpage balancing in thin packagesINVENSAS CORP·Filed 2018·Granted Nov 19, 2019·3 cites·21 claims
- 1083US2025125248A1Bonded structures with integrated passive componentADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2024·Application pending·0 cites
- 1181US9847238B2Fan-out wafer-level packaging using metal foil laminationINVENSAS CORP·Filed 2017·Granted Dec 19, 2017·3 cites·12 claims
- 1281US2025266401A1Direct bonded stack structures for increased reliability and improved yield in microelectronicsADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2025·Application pending·0 cites
- 1377US9972582B2Warpage balancing in thin packagesINVENSAS CORP·Filed 2017·Granted May 15, 2018·2 cites·20 claims
- 1476US9543277B1Wafer level packages with mechanically decoupled fan-in and fan-out areasINVENSAS CORP·Filed 2015·Granted Jan 10, 2017·3 cites·20 claims
- 1573US9583426B2Multi-layer substrates suitable for interconnection between circuit modulesINVENSAS CORP·Filed 2014·Granted Feb 28, 2017·2 cites·20 claims
- 1672US10955671B2Stretchable film assembly with conductive tracesINVENSAS CORP·Filed 2018·Granted Mar 23, 2021·1 cites·12 claims
- 1768US12124035B2Stretchable film assembly with conductive tracesADEIA SEMICONDUCTOR TECH LLC·Filed 2021·Granted Oct 22, 2024·0 cites·16 claims
- 1867US10734759B2Configurable smart object system with magnetic contacts and magnetic assemblyXCELSIS CORP·Filed 2019·Granted Aug 4, 2020·1 cites·20 claims
- 1964US9646946B2Fan-out wafer-level packaging using metal foil laminationINVENSAS CORP·Filed 2015·Granted May 9, 2017·1 cites·6 claims
- 2060US8785961B2Heat spreading substrateGUEVARA GABRIEL Z·Filed 2012·Granted Jul 22, 2014·2 cites·27 claims
- 2159US10586759B2Interconnection substrates for interconnection between circuit modules, and methods of manufactureINVENSAS CORP·Filed 2018·Granted Mar 10, 2020·0 cites·17 claims
- 2257US2025006520A1Apparatus for separating singulated die from substrate dicing tape and methods of using the sameADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2023·Application pending·0 cites
- 2356US2024222319A1Debonding repair devicesADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2023·Application pending·0 cites
- 2456US2023268300A1Bonded structuresADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2023·Application pending·0 cites
- 2555US10014243B2Interconnection substrates for interconnection between circuit modules, and methods of manufactureINVENSAS CORP·Filed 2017·Granted Jul 3, 2018·0 cites·20 claims
- 2655US2025079364A1Methods and structures employing metal oxide for direct metal bondingADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2023·Application pending·0 cites
- 2755US2024096683A1Apparatus for processing of singulated dies and methods for using the sameADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2023·Application pending·0 cites
- 2854US11239587B2Configurable smart object system with clip-based connectorsXCELSIS CORP·Filed 2019·Granted Feb 1, 2022·0 cites·19 claims
- 2954US2025006674A1Methods and structures for low temperature hybrid bondingADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2023·Application pending·0 cites
- 3051US11246230B2Configurable smart object system with methods of making modules and contactorsXCELSIS CORP·Filed 2018·Granted Feb 8, 2022·0 cites·12 claims
- 3151US2023115122A1Method of bonding thin substratesADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC·Filed 2022·Application pending·0 cites
- 3247US9502372B1Wafer-level packaging using wire bond wires in place of a redistribution layerINVENSAS CORP·Filed 2015·Granted Nov 22, 2016·0 cites·20 claims
- 3345US9390998B2Heat spreading substrateMOHAMMED ILYAS·Filed 2012·Granted Jul 12, 2016·0 cites·25 claims
- 3444US2019280421A1Configurable smart object system with grid or frame-based connectorsXCELSIS CORP·Filed 2019·Application pending·0 cites
- 3542US2019097362A1Configurable smart object system with standard connectors for adding artificial intelligence to appliances, vehicles, and devicesXCELSIS CORP·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →