Inventor · disambiguated record
Giridhar Nallapati
Also filed as: NALLAPATI GIRIDHAR
23 granted patents·35 pending applications·175 citations·filing 2012–2024
93Inventor score
Top patents by PatentIndex Score
58 records- 0195US9070551B2Method and apparatus for a diffusion bridged cell libraryQUALCOMM INC·Filed 2013·Granted Jun 30, 2015·60 cites·7 claims
- 0295US8782576B1Method and apparatus for a diffusion bridged cell libraryQUALCOMM INC·Filed 2013·Granted Jul 15, 2014·73 cites·2 claims
- 0394US10651122B1Integrated circuit (IC) interconnect structure having a metal layer with asymmetric metal line-dielectric structures supporting self-aligned vertical interconnect accesses (VIAS)QUALCOMM INC·Filed 2019·Granted May 12, 2020·12 cites·30 claims
- 0493US8836040B2Shared-diffusion standard cell architectureQUALCOMM INC·Filed 2012·Granted Sep 16, 2014·17 cites·20 claims
- 0583US12218041B2Integrated circuit (IC) packages employing a capacitor-embedded, redistribution layer (RDL) substrate for interfacing an IC chip(s) to a package substrate, and related methodsQUALCOMM INC·Filed 2021·Granted Feb 4, 2025·1 cites·20 claims
- 0680US9024418B2Local interconnect structures for high densityQUALCOMM INC·Filed 2013·Granted May 5, 2015·5 cites·20 claims
- 0779US11404373B2Hybrid low resistance metal linesQUALCOMM INC·Filed 2019·Granted Aug 2, 2022·2 cites·30 claims
- 0877US10247617B2Middle-of-line (MOL) metal resistor temperature sensors for localized temperature sensing of active semiconductor areas in integrated circuits (ICs)QUALCOMM INC·Filed 2016·Granted Apr 2, 2019·2 cites·14 claims
- 0976US2025118645A1Integrated circuit (ic) packages employing a capacitor-embedded, redistribution layer (rdl) substrate for interfacing an ic chip(s) to a package substrate, and related methodsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1073US2024203866A1INTEGRATED CIRCUITS (ICs) EMPLOYING DIRECTLY COUPLED METAL LINES BETWEEN VERTICALLY-ADJACENT INTERCONNECT LAYERS FOR REDUCED COUPLING RESISTANCE, AND RELATED METHODSQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1170US10636737B2Structure and method of metal wraparound for low via resistanceQUALCOMM INC·Filed 2018·Granted Apr 28, 2020·1 cites·5 claims
- 1266US9818817B2Metal-insulator-metal capacitor over conductive layerQUALCOMM INC·Filed 2013·Granted Nov 14, 2017·2 cites·13 claims
- 1364US11942414B2Integrated circuits (ICs) employing directly coupled metal lines between vertically-adjacent interconnect layers for reduced coupling resistance, and related methodsQUALCOMM INC·Filed 2021·Granted Mar 26, 2024·0 cites·15 claims
- 1463US2025380406A1Vertical bank redundancy in three-dimensional stacked dynamic random-access memory (dram) for improved yieldQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1563US2025380431A1High-bandwidth three-dimensional stacked memory with a base die enabling compute logic without memory power grid restrictionsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1662US2025336811A1High-precision backside resistorQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1762US2025351518A1Double-sided contact in backside power distribution network integration schemeQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1862US2025391739A1Dual-liner through-silicon via (tsv) for power and signal transmissionQUALCOMM INC·Filed 2024·Application pending·0 cites
- 1962US2025357326A1Semiconductor die having a metallization layer including a metal layer and a resistive metal in the metal layer to decrease parasitic capacitanceQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2061US2025385222A1High-bandwidth integrated circuit packaging of memory and logicQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2161US2025267932A1Recessed through-die vertical interconnect accesses to back-side power distribution networks and related methodsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2261US2025379188A1High-bandwidth memory (hbm) package-on-package (pop) dynamic random-access memory (dram) with semiconductor pillarsQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2361US2025385209A1Bumpless fan-out wafer-level integrated circuit package including memory and logicQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2461US2025279354A1Die interconnect structure with embedded inductor(s) including coupled coils formed in redistribution layer (rdl) and adjacent bump-level distribution layer (bdl) for improved q factorQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2561US2025239522A1Integrated circuit (ic) package with embedded power management integrated circuit (pmic)QUALCOMM INC·Filed 2024·Application pending·0 cites
- 2661US2025386517A1High bandwidth small form factor 3d integrated circuit package including memory and logicQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2760US2025300068A1Power/thermal via for three-dimensional (3d) chip stackingQUALCOMM INC·Filed 2024·Application pending·0 cites
- 2859US2025096139A1Airgaps in top layers of semiconductor devicesQUALCOMM INC·Filed 2023·Application pending·0 cites
- 2959US2025046716A1Modified reverse selective barrier structureQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3059US2025079337A1Integrated circuits with two-side metallization and external stiffening layer and related fabrication methodsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3159US2024105728A1Transistor devices with double-side contacts and standard cellQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3258US12446264B2Complementary field effect transistor (CFET) with balanced N and P drive currentQUALCOMM INC·Filed 2022·Granted Oct 14, 2025·0 cites·18 claims
- 3358US2025185300A1Electronic devices employing thin-gate insulator transistors coupled to varactors to reduce gate-to-source/drain voltage to avoid voltage breakdown, and related fabrication methodsQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3456US11973020B2Metal-insulator-metal capacitor with top contactQUALCOMM INC·Filed 2021·Granted Apr 30, 2024·0 cites·30 claims
- 3556US11973019B2Deep trench capacitors in an inter-layer medium on an interconnect layer of an integrated circuit die and related methodsQUALCOMM INC·Filed 2021·Granted Apr 30, 2024·0 cites·22 claims
- 3656US2025015047A1Single-step via-last process for multi-stack wafersQUALCOMM INC·Filed 2023·Application pending·0 cites
- 3754US12342595B2Transistor cell with self-aligned gate contactQUALCOMM INC·Filed 2021·Granted Jun 24, 2025·0 cites·13 claims
- 3854US2015064864A1Method and apparatus for a diffusion bridged cell libraryQUALCOMM INC·Filed 2014·Application pending·0 cites
- 3953US2024096964A1Vertical channel field effect transistor (vcfet) with reduced contact resistance and/or parasitic capacitance, and related fabrication methodsQUALCOMM INC·Filed 2022·Application pending·0 cites
- 4053US2019195700A1MIDDLE-OF-LINE (MOL) METAL RESISTOR TEMPERATURE SENSORS FOR LOCALIZED TEMPERATURE SENSING OF ACTIVE SEMICONDUCTOR AREAS IN INTEGRATED CIRCUITS (ICs)QUALCOMM INC·Filed 2019·Application pending·0 cites
- 4153US2024079352A1Integrated circuit (ic) packages employing capacitor interposer substrate with aligned external interconnects, and related fabrication methodsQUALCOMM INC·Filed 2022·Application pending·0 cites
- 4252US2023223341A1Low via resistance interconnect structureQUALCOMM INC·Filed 2022·Application pending·0 cites
- 4349US11437379B2Field-effect transistors (FET) circuits employing topside and backside contacts for topside and backside routing of FET power and logic signals, and related complementary metal oxide semiconductor (CMOS) circuitsQUALCOMM INC·Filed 2020·Granted Sep 6, 2022·0 cites·21 claims
- 4449US2022336351A1Multiple function blocks on a system on a chip (soc)QUALCOMM INC·Filed 2021·Application pending·0 cites
- 4548US9245971B2Semiconductor device having high mobility channelQUALCOMM INC·Filed 2013·Granted Jan 26, 2016·0 cites·45 claims
- 4647US10325979B1High density and reliable vertical natural capacitorsQUALCOMM INC·Filed 2018·Granted Jun 18, 2019·0 cites·23 claims
- 4746US9287347B2Metal-insulator-metal capacitor under redistribution layerQUALCOMM INC·Filed 2013·Granted Mar 15, 2016·0 cites·9 claims
- 4846US2021305155A1Via zero interconnect layer metal resistor integrationQUALCOMM INC·Filed 2020·Application pending·0 cites
- 4945US2015303145A1Back end of line (beol) local optimization to improve product performanceQUALCOMM INC·Filed 2014·Application pending·0 cites
- 5045US2021143056A1Spacer-based conductor cutQUALCOMM INC·Filed 2019·Application pending·0 cites
Showing the top 50 of 58 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →